Method and apparatus for testing LCD panel array

• US 5,285,150 A
• Filed: 11/26/1990
• Issued: 02/08/1994
• Est. Priority Date: 11/26/1990
• Status: Expired due to Term

• Current Assignee: Photon Dynamics Incorporated (KLA Corporation)
• Original Assignee: Photon Dynamics Incorporated (KLA Corporation)
• Inventors: Henley, Francois J., Miller, Michael J.
• Primary Examiner(s): Karlsen, Ernest F.
• Application Number:
  US07/618,183
• Time in Patent Office: 1,170 Days
• Field of Search: 324/158 R, 324/73.1, 324/158 T, 340/703, 340/793
• US Class Current: 324/760.02
• CPC Class Codes: G01R 31/308 using non-ionising electromagnetic radiation, e.g. optical radiation investigating or analysing materials by the use of optical means G01N21/00; image analysis G06T7/00
• CPC Class Codes: G01R 31/31724 Test controller, e.g. BIST state machine for scan test G01R31/318555
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309

Abstract

A hierarchical testing method is implemented taking advantage of the nature of the most common defects in an LCD panel to achieve fast effective parametric testing of LCD panels and the like. At the first hierarchy of testing, the panel is logically divided into zones and each zone tested in isolation to identify zones having at least one defect. At the next hierarchy, electro-optic assisted zone inspection is performed to identify where within the zone the defects are located. Lastly, every pixel is inspected using a voltage imaging method to determine whether the switching integrity of the pixel is acceptable. The testing apparatus includes a plurality of panel interface devices coupling the panel under test'"'"'s drive lines and gate lines to a precision measurement unit (PMU). A controller determines the PMU signals and configures the panel interface devices. The PMU monitors select drive lines and gate lines to isolate zones having defects. An electro-optic voltage measurement system is used to identify the location of defects within an isolated zone.

Claims

1. A method for testing a panel array of circuit elements, each element coupled to a pair formed by a drive line and a gate line, each of the drive lines being coupled to one of two opposing first boundaries of the panel and each of the gate lines being coupled to second boundaries of the panel which are adjacent and generally orthogonal to said first boundaries, the panel being logically configurable into to test zones, the method comprising the steps of:

isolating the test zones having a cross short defect, each one of said test zones having a set of drive lines coupled to the first boundaries and a set of said gate lines coupled to the second orthogonal boundaries; and

thereafter

inspecting without establishing individual physical connections to each circuit element within said zone, one of said isolated test zones to identify the location of said cross short defect within said isolated zone by inputting a first voltage signal to said set of drive lines for the isolated zone and a second voltage signal, distinguishable from the first voltage signal, to said set of gate lines, for said isolated zone;

thereupon

for each drive line of said set of drive lines, electo-optically sampling voltage magnitude along each one of said drive lines by means of voltage imaging, wherein a difference between said sampled voltage and said first voltage signal signifies the presence of a defect along the electro-optically sampled drive line; and

for each gate line of said set of gate lines, electro-optically sampling a voltage along each one of said gate lines, wherein a difference between said sampled voltage and said second voltage signal signifies presence of a defect along the electro-optically sampled gate line.

2. The method of claim 1 in which the step of inspecting an isolated zone further comprises the steps:

inputting a different drive line input voltage signal to each drive line of said set of drive lines;

inputting a different gate line input voltage signal to each gate line of said set of gate lines of, said gate line input voltage signals being distinguishable from said drive line input voltage signals;

thereupon

for each drive line previously signified as having a defect, electro-optically sampling voltage magnitude along each one of said drive lines;

thereupon

comparing said drive line sampled voltage magnitude of said each one of said signified drive lines with predicted voltages to identify a defect location;

thereafter

for each gate line of said set of gate lines, electro-optically sampling voltage magnitude along each one of said gate lines; and

thereupon

comparing said gate line sampled voltage of said each one of said signified gate lines with predicted voltages to indentify a defect location.

3. The method of claim 1 further comprising the steps:

inputting a first probe voltage signal at a first end of every other drive line along the first boundary and inputting a second probe voltage signal, distinguishable from the first probe voltage signal, at a first end of remaining drive lines along said first boundary;

for each drive line receiving said first voltage signal, electro-optically sampling a test voltage for each one of said drive lines at a second end opposite said first end, wherein a difference between said test voltage and said first probe voltage signal signifies the presence of an open circuit defect along the electro-optically sampled drive line.

4. The method of claim 1 wherein said inspection step comprises the step of:

performing a pixel inspection of the isolated zone by electro-optically imaging said isolated test zone to establish the switching state of each pixel within the imaged area.

5. The method of claim 1 in which said first boundaries comprise two generally parallel panel boundary elements on opposite sides of said panel, and in which said second boundaries comprise two generally parallel panel boundary elements on opposite ends of said panel.