Semiconductor device with oxide layer

• US 5,289,030 A
• Filed: 03/05/1992
• Issued: 02/22/1994
• Est. Priority Date: 03/06/1991
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hamatani, Toshiji, Mase, Akira, Yamazaki, Shunpei
• Primary Examiner(s): Mintel, William
• Assistant Examiner(s): LOKE, STEVEN HO YIN
• Application Number:
  US07/846,164
• Time in Patent Office: 719 Days
• Field of Search: 257/57, 257/59, 257/66, 257/72, 257/412, 257/900, 257/410, 257/411, 257/368, 437/187
• US Class Current: 257/410
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136245 having complementary transistors
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78651 Silicon transistors H01L29/78606 - H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78666 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: Y10S 257/90 MOSFET type gate sidewall insulating spacer

Abstract

An insulated gate field effect semiconductor device comprising a substrate having provided thereon a thin-film structured insulated gate field effect semiconductor device, said device being characterized by that it comprises a metal gate electrode and at least the side thereof is coated with an oxide of the metal. The insulated gate field effect semiconductor device according to the present invention is also characterized by that the contact holes for the extracting contacts of the source and drain regions are provided at about the same position of the end face of the anodically oxidized film established at the side of the gate. Furthermore, the present invention provides a method for forming insulated gate field effect semiconductor devices using less masks.

Claims

1. A semiconductor device comprising:

source, drain and channel regions formed within one non-single crystalline semiconductor film on an insulating surface of a substrate;

a gate electrode comprising a metal or a metal silicide, formed on said channel region with a gate insulating layer therebetween; and

an oxide layer of the same said metal or metal silicide covering said gate electrode,

wherein said channel region extends beyond side edges of said gate electrode in a direction along the source and drain regions.

2. The semiconductor device of claim 1 wherein a boundary between said source and channel regions and a boundary between said drain and channel regions are aligned with outer edges of said oxide layer.

3. The semiconductor device of claim 1 wherein said gate electrode comprises a material selected from the group consisting of aluminum, molybdenum, tungsten, titanium, tantalum and a silicide thereof.

4. The semiconductor device of claim 1 wherein said oxide layer is formed by anodizing a portion of said gate electrode.

5. A semiconductor device comprising:

source, drain and channel regions formed within one semiconductor film;

a gate electrode comprising a metal or a metal silicide, formed on said channel region with a gate insulating layer therebetween;

source and drain electrodes connected to the source and drain semiconductor regions, respectively; and

an oxide layer of said metal or metal silicide covering said gate electrode;

wherein said oxide layer is in contact with said gate electrode and said at least one of said source and drain electrodes.

6. The semiconductor device of claim 5 wherein a side of at least a corresponding one of said source and drain regions is aligned with a side of said oxide layer.

7. The semiconductor device of claim 5 wherein said gate electrode is distant from corresponding one of said source and drain regions substantially by a thickness of said oxide layer in a direction from said source region to said drain region.

8. The semiconductor device of claim 5 wherein said gate electrode comprises a material selected from the group consisting of aluminum, molybdenum, tungsten, titanium, tantalum and a silicide thereof.

9. The semiconductor device of claim 5 wherein said oxide layer is formed by anodizing a portion of said gate electrode.

10. A semiconductor device comprising:

source, drain and channel regions formed within one non-single crystalline semiconductor layer on an insulating surface of a substrate; and

a gate electrode comprising aluminum, located adjacent to said channel region with a gate insulating layer therebetween,

wherein at least a side surface of said gate electrode is provided with an oxide layer of the aluminum of said gate electrode and said channel region extends beyond side edges of said gate electrode in a direction along the source and drain regions.

11. The semiconductor device of claim 10 wherein said oxide layer is formed by anodizing a portion of said gate electrode.

12. A semiconductor device having a plurality of thin film transistors formed on a substrate, each of said thin film transistors comprising:

source, drain and channel regions formed within one non-single crystalline semiconductor film formed on an insulating surface of a substrate;

a gate electrode comprising a metal or a metal silicide formed on said channel region with a gate insulating layer therebetween; and

an oxide layer of the same said metal or metal silicide covering said gate electrode,

wherein said channel region extends beyond side edges of said gate electrode in a direction along the source and drain regions.

13. The semiconductor device of claim 12 wherein said oxide layer is formed by anodizing a portion of said gate electrode.

14. A semiconductor device having a plurality of thin film transistors formed on a substrate, each of said thin film transistors comprising:

source, drain and channel regions formed within one non-single crystalline semiconductor film formed on an insulating surface of a substrate;

a gate electrode comprising aluminum, located adjacent to said channel region with a gate insulating layer therebetween,

wherein at least a side surface of said gate electrode is provided with an oxide layer of the aluminum of said gate electrode and said channel region extends beyond side edges of said gate electrode in a direction along the source and drain regions.

15. The semiconductor device of claim 14 wherein said oxide layer is formed by anodizing a portion of said gate electrode.

16. A semiconductor device comprising:

a non-single crystalline semiconductor film formed on an insulating surface of a substrate having formed therein a source region, a drain region, and a semiconductor region therebetween;

a gate electrode comprising a metal or a metal silicide, formed on said semiconductor region with a gate insulating layer therebetween; and

an oxide layer of the same said metal or metal silicide covering said gate electrode,

wherein said semiconductor region extends beyond side edges of said gate electrode in a direction along the source and drain regions.

17. A semiconductor device comprising:

a non-single crystalline semiconductor layer formed on an insulating surface of a substrate having formed therein a source region, a drain region, and a semiconductor region therebetween;

a gate electrode comprising aluminum, located adjacent to said semiconductor region with a gate insulating layer therebetween,

wherein at least a side surface of said gate electrode is provided with an oxide layer of the aluminum of said gate electrode and said semiconductor region extends beyond side edges of said gate electrode in a direction along the source and drain regions.