Circuit for detection of the state of an integrated circuit fuse in a balanced fuse configuration

• US 5,291,139 A
• Filed: 04/10/1991
• Issued: 03/01/1994
• Est. Priority Date: 04/10/1990
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Inventors: Tailliet, Francois, Fruhauf, Serge
• Primary Examiner(s): Strecker, Gerard R.
• Application Number:
  US07/683,245
• Time in Patent Office: 1,056 Days
• Field of Search: 324/550, 324/679, 324/705, 324/158 R, 324/73.1, 324/537, 340/638, 307/350, 307/355, 307/359, 307/362, 365/96
• US Class Current: 324/550
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory

Abstract

A circuit for the detection of a fuse with oxide vertical fusing has another fuse that is of the same type but cannot be blown and, in parallel with each of the fuses, a voltage reference circuit. The output of each of the voltage reference circuits is an input of a differential comparator. This differential comparator is preferably provided with a voltage reference circuit that is independent of the supply voltage Vcc.

Claims

1. A detection circuit for the detection of the state of a first fuse of the type with vertical oxide fusing and which has two possible states, said detection circuit comprising:

said first fuse, a second fuse of the type with vertical oxide fusing and having only one possible state, a differential comparator having first and second input nodes and an output node, a first voltage reference circuit, and a second voltage reference circuit, said first fuse being connected between a voltage reference ground and said first input node of said differential comparator, said second fuse being connected between said voltage reference ground and said second input node of said differential comparator, said first voltage reference ground and said first input node of said voltage reference ground and said first input node of said differential comparator, said second voltage reference circuit being connected between said voltage reference ground and said second input node of said differential comparator;

wherein said first and second voltage reference circuits provide equal reference voltages.

2. A detection circuit in accordance with claim 1 wherein said first and second fuses are technologically identical when they are in the same state.

3. A detection circuit in accordance with claim 1, wherein said first and second voltage reference circuits are technologically identical.

4. A detection circuit in accordance with claim 3 wherein said first and second fuses are technologically identical when they are in the same state.

19. A detection circuit in accordance with claim 1 further comprising a supply voltage source and a third voltage reference circuit, wherein said supply voltage source is connected to each of said first and second voltage reference circuits, and wherein said third voltage reference circuit is connected to said differential comparator to provide a reference voltage independent of the supply voltage from said supply voltage source so that fluctuations in the supply voltage from said supply voltage source will not disturb the operation of said differential comparator.

20. A detection circuit in accordance with claim 1 wherein the elements which define the voltage at said first input node of said differential comparator are topologically symmetrical with the corresponding elements which define the voltage at said second input node of said differential comparator.

5. A detection circuit for the detection of the state of a first fuse of the type with vertical oxide fusing and which has two possible states, said detection circuit comprising:

said first fuse, a second fuse of the type with vertical oxide fusing and having only one possible state, a differential comparator having first and second input nodes and an output node, a first voltage reference circuit, and a second voltage reference circuit, said first fuse being connected between a voltage reference ground and said first input node of said differential comparator, said second fuse being connected between said voltage reference ground and said second input node of said differential comparator, said first voltage reference circuit being connected between said voltage reference ground and said first input node of said differential comparator, said second voltage reference circuit being connected between said voltage reference ground and said second input node of said differential comparator;

wherein said detection circuit is an integrated circuit, with said detection circuit further comprising a first transistor having a gate, and a logic NAND gate having first and second inputs and an output, wherein said first transistor is connected in series with said first fuse between said voltage reference ground and said first input node of said differential comparator with said first transistor being connected between said first fuse and said first input node of said differential comparator, wherein the output of said NAND gate is connected to the gate of said first transistor, and wherein the output node of said differential comparator is connected to the first input of said NAND gate, whereby a control signal for the blowing of said first fuse can be applied to said second input of said NAND gate and the reading of the state of said first fuse is prevented during the blowing of said first fuse.

6. A detection circuit in accordance with claim 5 further comprising a second transistor having a gate, said second transistor being connected in series with said first fuse between said voltage reference ground and said second input node of said differential comparator with said second transistor being connected between said second fuse and said second input node of said differential comparator, said gate of said second transistor being connected to said output of said NAND gate.

7. A detection circuit in accordance with claim 6 wherein said first and second voltage reference circuits are technologically identical to each other, and wherein said first transistor and said second transistor are technologically identical to each other.

8. A detection circuit in accordance with claim 7 wherein said first and second fuses are technologically identical when they are in the same state.

9. A detection circuit in accordance with claim 6 wherein the elements which define the voltage at said first input node of said differential comparator are identical to the corresponding elements which define the voltage at said second input node of said differential comparator.

10. A detection circuit in accordance with claim 6 wherein the elements which define the voltage at said first input node of said differential comparator are topologically symmetrical with the corresponding elements which define the voltage at said second input node of said differential comparator.

12. A detection circuit in accordance with claim 6 further comprising a fusing circuit, a third transistor with a gate, and a fourth transistor with a gate, said third transistor being connected between said fusing circuit and the connection of said first fuse to said first transistor, with said gate of said third transistor being controlled by said fusing circuit, with said fourth transistor being connected between said voltage reference ground and the connection of said second fuse to said second transistor, with said gate of said fourth transistor being connected to said voltage reference ground.

13. A detection circuit in accordance with claim 12 wherein said first and second voltage reference circuits are technologically identical to each other, wherein said first and second transistors are technologically identical to each other, and wherein said third and fourth transistors are technologically identical to each other.

14. A detection circuit in accordance with claim 13 wherein said first and second fuses are technologically identical when they are in the same state.

15. A detection circuit in accordance with claim 14 wherein the elements which define the voltage at said first input node of said differential comparator are topologically symmetrical with the corresponding elements which define the voltage at said second input node of said differential comparator.

16. A detection circuit in accordance with claim 12 further comprising a supply voltage source and a third voltage reference circuit, wherein said supply voltage source is connected to each of said first and second voltage reference circuits, and wherein said third voltage reference circuit is connected to said differential comparator to provide a reference voltage independent of the supply voltage from said supply voltage source so that fluctuations in the supply voltage from said supply voltage source will not disturb the operation of said differential comparator.

17. A detection circuit in accordance with claim 16 wherein said first and second voltage reference circuits are technologically identical to each other, wherein said first and second transistors are technologically identical to each other, wherein said third and fourth transistors are technologically identical to each other, and wherein said first and second fuses are technologically identical when they are in the same state.

18. A detection circuit in accordance with claim 16 wherein the elements which define the voltage at said first input node of said differential comparator are topologically symmetrical with the corresponding elements which define the voltage at said second input node of said differential comparator.

26. The circuit of claim 14, wherein said feedback circuitry is connected to turn off said third and fourth transistors.

11. A detection circuit in accordance with claim 11 further comprising a supply voltage source and a third voltage reference circuit, wherein said supply voltage source is connected to each of said first and second voltage reference circuits, and wherein said third voltage reference circuit is connected to said differential comparator to provide a reference voltage independent of the supply voltage from said supply voltage source so that fluctuations in the supply voltage from said supply voltage source will not disturb the operation of said differential comparator.

21. A circuit for the detection of the state of an integrated circuit fuse, comprising:

a comparator having first and second input connections, and configured to provide an output signal which is dependent on voltages of said input connections;

first and second voltage reference circuits, each connected to provide an identical voltage from a common node to a respective input of said comparator;

a series combination of a first fusible element and a first transistor, connected in parallel with said first voltage reference circuit; and

a series combination of a second fusible element and a second transistor, connected in parallel with said second voltage reference circuit;

a third transistor connected to the node between said first fusible element and said first transistor, to selectably provide a high voltage thereto; and

wherein no other operable transistor is connected to the node between said second fusible element and said second transistor;

feedback circuitry connected to turn off said first transistor in at least partial dependence on the output state of said comparator;

wherein, if said first fusible element has not been blown, said comparator sees balanced circuit legs at said first and second input connections.

22. The circuit of claim 21, wherein said third transistor is a native transistor.

23. The circuit of claim 21, further comprising an additional voltage reference circuit connected to provide a reference voltage to said comparator.

24. A circuit for the detection of the state of an integrated circuit fuse, comprising:

a comparator having first and second input connections, and configured to provide an output signal which is dependent on voltages of said input connections;

first and second voltage reference circuits, each connected to provide an identical voltage from a common node to a respective input of said comparator;

a series combination of a first fusible element and a first transistor, connected in parallel with said first voltage reference circuit;

a series combination of a second fusible element and a second transistor, connected in parallel with said second voltage reference circuit;

said second fusible element being substantially technologically identical to said first fusible element;

a third transistor connected to the node between said first fusible element and said first transistor, to selectably provide a high voltage thereto, and a fourth transistor connected to the node between said second fusible element and said second transistor;

said fourth transistor being technologically similar to said third transistor, and being connected to be inoperable;

feedback circuitry connected to turn off said first transistor in at least partial dependence on the output state of said comparator;

whereby, if said first fusible element has not been blown, said comparator sees balanced circuit legs at said first and second input connections.

25. The circuit of claim 24, wherein said third and fourth transistors are both native transistors.

27. The circuit of claim 24, further comprising an additional voltage reference circuit connected to provide a reference voltage to said comparator.