Method for forming a MOS transistor and structure thereof
First Claim
1. A method for forming a MOS transistor comprising the steps of:
- forming a semiconductor film on a substrate;
forming a gate insulating film on said semiconductor film;
forming a conductive material on said gate insulating film;
patterning said conductive material into an island;
removing a portion of said gate insulating film by etching to form an insulating film thinner than said gate insulating film;
forming a gate electrode by reducing a width of said island by removing a portion of said island by etching; and
introducing an impurity into said semiconductor film with said gate electrode as a mask wherein the amount of said removed portion of the gate insulating film is controlled so that the impurity concentration in said semiconductor film under said insulating film thinner than said gate insulating film is rendered larger than that in said semiconductor film under the removed portion of said island by said introducing step.
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Accused Products
Abstract
A method for forming a MOS transistor having LDD structure by a simple and a few number of processes and a structure thereof are described. In accordance with the present invention, a low concentration of an impurity region can be formed in a semiconductor film part between an end of gate electrode and source or drain, by forming an ordinary gate insulating film extending beyond the gate electrode in the direction along the source and drain, in place of a spacer in the side of gate electrode which has been required for a preparation of conventional TFT having LDD structure, and further by forming a thinner insulating film than the gate insulating film in the side thereof, and by utilizing the thickness difference between the gate insulating film part excepting the gate electrode and the thin insulating film in the side thereof.
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Citations
22 Claims
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1. A method for forming a MOS transistor comprising the steps of:
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forming a semiconductor film on a substrate; forming a gate insulating film on said semiconductor film; forming a conductive material on said gate insulating film; patterning said conductive material into an island; removing a portion of said gate insulating film by etching to form an insulating film thinner than said gate insulating film; forming a gate electrode by reducing a width of said island by removing a portion of said island by etching; and introducing an impurity into said semiconductor film with said gate electrode as a mask wherein the amount of said removed portion of the gate insulating film is controlled so that the impurity concentration in said semiconductor film under said insulating film thinner than said gate insulating film is rendered larger than that in said semiconductor film under the removed portion of said island by said introducing step. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for forming a MOS transistor comprising the steps of:
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forming a semiconductor film on a substrate; forming an insulating film on said semiconductor film; forming a conductive material on said insulating film; patterning said conductive material into an island; removing a portion of said insulating film by etching to leave a portion of said insulating film unremoved under island and thin a portion of said insulating film outside the unremoved portion of said insulating film; forming a gate electrode by reducing a width of said island by removing a portion of said island by etching; and introducing an impurity into said semiconductor film with said gate electrode as a mask wherein the amount of said removed portion of the gate insulating film is controlled so that the impurity concentration in said semiconductor film under the thinned portion of said insulating film is rendered larger than that in said semiconductor film under the removed portion of said island by said introducing step. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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19. A method for forming a MOS transistor comprising the steps of:
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forming a semiconductor island on an insulating surface of a substrate; forming an insulating layer on said semiconductor island; forming a gate electrode on a part of said insulating layer; and introducing an impurity to a portion of said semiconductor island at an acceleration voltage through said insulating layer with said gate electrode as a mask in order to form source and drain regions in said semiconductor island and a channel region therebetween, wherein said insulating layer has a first portion located under said gate electrode and extending beyond said gate electrode, and a second portion located on said source and drain regions and having a thickness thinner than said first portion, wherein the thickness of said first and second portions and said acceleration voltage are selected in order that LDD regions are formed between said channel region and said source and drain regions. - View Dependent Claims (20, 21, 22)
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Specification