×

Process for lay-out of a semiconductor integrated circuit

  • US 5,292,687 A
  • Filed: 02/07/1992
  • Issued: 03/08/1994
  • Est. Priority Date: 02/08/1991
  • Status: Expired due to Fees
First Claim
Patent Images

1. A process for lay-out of a semiconductor integrated circuit, comprising the steps of:

  • determining a coordinate of a pad position which is most appropriate in accordance with a lead frame for packaging said semiconductor integrated circuit and a chip size of said semiconductor integrated circuit;

    arranging a pad at said coordinate;

    connecting said pad to a pad block, said pad block being positioned to be most appropriate relative to said pad;

    determining a coordinate of said pad block; and

    connecting internal regions of said pad block in accordance with said coordinate of said pad block.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×