FSK data receiving system

• US 5,293,408 A
• Filed: 09/09/1992
• Issued: 03/08/1994
• Est. Priority Date: 10/14/1991
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Mimura, Masahiro, Hasegawa, Makoto, Harada, Hiroyuki, Takahashi, Kazuaki, Imagawa, Yasumi, Namura, Yasuaki, Yokozaki, Katsushi
• Primary Examiner(s): Kuntz, Curtis
• Assistant Examiner(s): Webster, Bryan E.
• Application Number:
  US07/942,183
• Time in Patent Office: 545 Days
• Field of Search: 375/45, 375/88, 375/89, 375/102, 329/300, 329/302, 329/303, 455/102
• US Class Current: 375/349
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04L 27/152 using controlled oscillators, e.g. PLL arrangements

Abstract

A data receiving system comprising an I base-band signal and a Q base-band signal which are used in a quadrature demodulation operation. Zero-crossing points of respective base-band signals are detected and a control signal is generated in response to each zero-crossing point. A phase-shift switching circuit alternately selects either the I base-band signal or the Q base-band signal in response to the control signal to generate an I/Q base-band signal. And, a demodulation operation is executed on the basis of the I/Q signal.

Claims

1. A data receiving system comprising:

a carrier wave signal being modulated with a frequency deviation;

a local oscillator means generating a local oscillator signal having substantially the same frequency as said carrier wave signal;

a mixer means for producing a base-band signal by mixing said local oscillator signal and said carrier wave signal;

a standard voltage detecting means which detects a standard voltage of said base-band signal so as to change its output signal at the timing the standard voltage is detected;

a phase control means which is provided between said local oscillator means and said mixer means for shifting a phase of the local oscillator signal by an amount of 0°

or 90°

in response to the output signal from the standard voltage detecting means;

a first base-band mixer means for mixing said base-band signal and said output signal from said standard voltage detecting means; and

a first demodulation means for executing a demodulation on the basis of said base-band signal and an output signal from said first base-band mixer.

2. A data receiving system in accordance with claim 1 in which said standard voltage of the standard voltage judging means is set to be 0 V.

3. A data receiving system in accordance with claim 1 in which said output signal of the standard voltage judging means is a signal having two values inverted stepwise every time when the standard voltage is detected.

4. A data receiving system in accordance with claim 1 in which said the standard voltage judging means inhibits its detecting operation during a predetermined period of time after the standard voltage has been detected.

5. A data receiving system in accordance with claim 1 in which said phase control means is a phase switching circuit which changes over the phase of the local oscillator means between 0°

and 90°

.

6. A data receiving system in accordance with claim 1 in which said phase control means is a phase modulation circuit which modulates the phase of the local oscillator means by an amount of 0°

or 90°

.

7. A data receiving system in accordance with claim 1 further comprises a limiter amplifier means for limiting an amplitude of said base-band signal, an exclusive-OR means for generating an exclusive-OR result from an output of said limiter amplifier means and the output of said standard voltage detecting means so as to serve as said first base-band mixer means, and a first demodulation means for executing a demodulation on the basis of a phase relationship between the output signal from said limiter amplifier and an output from said exclusive-OR means.

8. A data receiving system in accordance with claim 1 in which said first demodulation means is constituted by a 90°

delay means for delaying the base-band signal or the output signal from the first base-band mixer means.

9. A data receiving system in accordance with claim 1 in which said first demodulation means is constituted by a 90°

phase-shift means for shifting a phase of the base-band signal or the output signal from the first base-band mixer means.

10. A data receiving system in accordance with claim 1 in which said first demodulation means includes a second base-band mixer means for mixing the base band signal and its phase-shifted signal by an amount of 90 degrees and a third base-band mixer means for mixing an output signal from said second base-band mixer means and the output signal from said standard voltage detecting means, and executes a data decoding operation based on the third base-band mixer means.

16. A data receiving system in accordance with claim 1 further includes, in addition to said first demodulation circuit, a frequency judging means for judging a frequency of the output signal from said standard voltage judging means, a control signal generating means for obtaining a first control signal based on an output signal from said frequency judging means, a second demodulation means which inputs an output signal of the frequency judging means and an output signal of the first demodulation means and outputs a second demodulation signal by selecting either an inverted/non-inverted output signal of the frequency judging means or the output signal of the first demodulation means based on a judgement of an in-phase/opposite-phase relationship between the output signal of the frequency judging means and the output signal of the first demodulation means, whereby a third demodulation signal is obtained from said first and second demodulation signals in accordance with a first control signal so that a data decoding operation can be realized by utilizing the third demodulation signal.

11. A data receiving system comprising:

a carrier wave signal being modulated with a frequency deviation;

a local oscillator means generating a local oscillator signal having substantially the same frequency as said carrier wave signal;

a mixer means for producing a base-band signal by mixing said local oscillator signal and said carrier wave signal;

a standard voltage detecting means which detects a standard voltage of said base-band signal so as to change its output signal at the timing the standard voltage is detected;

a phase control means which is provided between said local oscillator means and said mixer means for shifting a phase of the local oscillator signal by an amount of 0°

or 90°

in response to the output signal from the standard voltage detecting means;

a limiter amplifier means for limiting an amplitude of said base-band signal;

a first base-band mixer means for mixing an output signal from said limiter amplifier means and the output signal from the standard voltage detecting means;

a first demodulation means for executing a demodulation on the basis of said base-band signal, an output signal from said first base-band mixer, and the output signal from the standard voltage detecting means.

12. A data receiving system in accordance with claim 11 in which said first demodulation means includes a phase-shift means for shifting a phase of either the output signal of said limiter amplifier means or the output signal of said first base-band mixer by an amount of 90 degrees, and a mixer means for mixing an output signal from said phase-shift means and the other of the output signal of said limiter amplifier means and the output signal of said first base-band mixer.

13. A data receiving system in accordance with claim 12 in which said phase-shift means is constituted by a register circuit inputting the output signal from the standard voltage detecting means as its clock signal.

14. A data receiving system in accordance with claim 11 in which said first demodulation means includes a delay means for delaying a phase of either the output signal of said limiter amplifier means or the output signal of said first base-band mixer by an amount of 90 degrees, and a mixer means for mixing an output signal from said phase-shift means and the other of the output signal of said limiter amplifier means and the output signal of said first base-band mixer.

15. A data receiving system in accordance with claim 11 in which said first demodulation means includes a second base-band mixer means for mixing the output signal of said first base-band mixer and its phase-shifted signal by an amount of 90 degrees and a third base-band mixer means for mixing an output signal from said second base-band mixer means and the output signal from said standard voltage detecting means, and executes a data decoding operation based on the third base-band mixer means.

47. A data receiving system in accordance with claim 11 further includes, in addition to said first demodulation circuit, a frequency judging means for judging a frequency of the output signal from said standard voltage judging means, a control signal generating means for obtaining a first control signal based on an output signal from said frequency judging means, a second demodulation means which inputs an output signal of the frequency judging means and an output signal of the first demodulation means and outputs a second demodulation signal by selecting either an inverted/non-inverted output signal of the frequency judging means or the output signal of the first demodulation means based on a judgement of an in-phase/opposite-phase relationship between the output signal of the frequency judging means and the output signal of the first demodulation means, whereby a third demodulation signal is obtained from said first and second demodulation signals in accordance with a first control signal so that a data decoding operation can be realized by utilizing the third demodulation signal.

17. A data receiving system comprising:

a carrier wave signal being modulated with a frequency deviation;

a local oscillator means generating a local oscillator signal having substantially the same frequency as said carrier wave signal;

a mixer means for producing a base-band signal by mixing said local oscillator signal and said carrier wave signal;

a standard voltage detecting means for detecting a standard voltage of said base-band signal;

a pulse generating means for generating a pulse having a width corresponding to a predetermined period of time;

a phase control means which is provided between said local oscillator means and said mixer means for shifting a phase of the local oscillator signal by an amount of 0°

or 90°

in response to an output signal from the pulse generating means;

a fourth demodulation means for executing a demodulation operation on the basis of a sign change of the base-band signal with respect to the standard voltage in any one or both of the changing points of said 0° and

90°

phase-shifts.

18. A data receiving system in accordance with claim 17 in which said the standard voltage judging means inhibits its detecting operation during a predetermined period of time after the standard voltage has been detected.

19. A data receiving system in accordance with claim 17 in which said phase control means is a phase switching circuit which changes over the phase of the local oscillator means between 0°

and 90°

.

20. A data receiving system in accordance with claim 17 in which said phase control means is a phase modulation circuit which modulates the phase of the local oscillator means by an amount of 0°

or 90°

.

21. A data receiving system in accordance with claim 17 in which said fourth demodulation means executes the demodulation by judging whether or not a sign of the base-band signal with respect to the standard voltage is changed before and after the local oscillator signal is shifted from 0°

to 90°

or vice versa by the phase control means.

22. A data receiving system in accordance with claim 17 further includes, in addition to said fourth demodulation circuit, a pulse number judging means for judging a pulse number of the output signal from said pulse generating means, a control signal generating means for obtaining a second control signal based on an output signal from said pulse number judging means, a fifth demodulation means which inputs an output signal from the pulse number judging means and an output signal of the fourth demodulation means and outputs a fifth demodulation signal by selecting either an inverted/non-inverted output signal of the pulse number judging means or the output signal of the fourth demodulation means based on a judgement of an in-phase/opposite-phase relationship between the output signal of the pulse number judging means and the output signal of the fourth demodulation means, whereby a sixth demodulation signal is obtained from said fourth and fifth demodulation signals in accordance with a second control signal so that a data decoding operation can be realized by utilizing the sixth demodulation signal.

23. A data receiving system comprising:

a first and a second base-band signals which have quadrature phases with each other and whose phase relationship is relatively inverted in accordance with a positive and a negative frequency deviations of a carrier wave signal;

a signal selecting means for inputting said first and second base-band signals and alternately selecting either of them to generate a third base-band signal;

a standard voltage detecting means for comparing the third base-band signal with a standard voltage to generate a control signal when the third base-band signal crosses the standard voltage;

a sign change judging means for inputting said control signal and said third base-band signal to make a judgement of whether or not a sign of the third base-band signal is changed before and after a changing point of the control signal; and

a mixer means for mixing a judging signal outputted from said sign change judging means and said control signal.

24. A data receiving system in accordance with claim 23 in which said signal selecting means includes a limiter amplifier and a three-state circuit.

25. A data receiving system in accordance with claim 23 in which said signal selecting means includes an analogue switching circuit and a limiter amplifier.

26. A data receiving system in accordance with claim 23 in which said mixer means includes an exclusive-OR circuit having an input terminal connected to an input terminal of said mixer means and an output terminal connected to an output terminal of the mixer means.

27. A data receiving system in accordance with claim 23 in which said mixer means includes a mixer having a first and a second input terminals and a limiter amplifier, and said first and second input terminals of said mixer are connected to input terminals of the mixer means, and an output signal of said mixer is supplied to said limiter amplifier, and further an output terminal of the limiter amplifier is connected to an output terminal of said mixer means.

28. A data receiving system in accordance with claim 23 in which said standard voltage detecting means includes an edge detecting circuit which detects a sign change of said third base-band signal, a first D-type flip-flop circuit which inputs an output signal from said edge detecting circuit as a clock input signal, and an inverted output signal of said first D-type flip-flop circuit is used as a data input signal of said first D-type flip-flop circuit so that an output signal of said standard voltage detecting means is fed from an output terminal of said first D-type flip-flop circuit whose output is inverted alternately in response to said clock input signal.

29. A data receiving system in accordance with claim 23 in which said sign change judging means includes an edge detecting circuit which inputs said control signal, a second D-type flip-flop circuit having a data input terminal which inputs said third base-band signal, a third D-type flip-flop circuit having a data input terminal which inputs an output signal from said second D-type flip-flop circuit, said second and third D-type flip-flop circuits having clock input terminals which input an output signal from said edge detecting circuit, and a first exclusive-OR circuit which inputs output signals from said second and third D-type flip-flop circuits and outputs a signal to an output terminal of said sign change judging circuit.

30. A data receiving system in accordance with claim 28 in which said edge detecting circuit includes an even number of NOT circuits which delay an input signal of the edge detecting circuit, a second exclusive-OR circuit which compares the input signal of the edge detecting circuit and an output signal of said NOT circuits, and an input terminal of said NOT circuits is connected to an input terminal of said edge detecting circuit and an output terminal of said second exclusive-OR circuit is connected to an output terminal of said edge detecting circuit.

31. A data receiving system in accordance with claim 28 in which said edge detecting circuit includes a third exclusive-OR circuit having a first and a second input terminals, a capacitance element one end of which is connected to a first input terminal of said third exclusive-OR circuit and the other end of which is grounded, a resistance interposed between the first input terminal and a second input terminal of said third exclusive-OR circuit for detecting a current, said second input terminal of the third exclusive-OR circuit being connected to an input terminal of said edge detecting circuit, and said third exclusive-OR circuit having an output terminal connected to an output terminal of said edge detecting circuit.

48. A data receiving system in accordance with claim 29 in which said edge detecting circuit includes an even number of NOT circuits which delay an input signal of the edge detecting circuit, a second exclusive-OR circuit which compares the input signal of the edge detecting circuit and an output signal of said NOT circuits, and an input terminal of said NOT circuits is connected to an input terminal of said edge detecting circuit and an output terminal of said second exclusive-OR circuit is connected to an output terminal of said edge detecting circuit.

49. A data receiving system in accordance with claim 29 in which said edge detecting circuit includes a third exclusive-OR circuit having a first and a second input terminals, a capacitance element one end of which is connected to a first input terminal of said third exclusive-OR circuit and the other end of which is grounded, a resistance interposed between the first input terminal and a second input terminal of said third exclusive-OR circuit for detecting a current, said second input terminal of the third exclusive-OR circuit being connected to an input terminal of said edge detecting circuit, and said third exclusive-OR circuit having an output terminal connected to an output terminal of said edge detecting circuit.

32. A data receiving system comprising:

a first and a second base-band signals which have quadrature phases with each other and whose phase relationship is relatively inverted in accordance with a positive and a negative frequency deviations of a carrier wave signal;

a signal selecting means for inputting said first and second base-band signals and alternately selecting either of them to generate a third base-band signal;

a standard voltage detecting means for comparing the third base-band signal with a standard voltage to generate a control signal when the third base-band signal crosses the standard voltage;

a mixer means for mixing said third base-band signal and said control signal; and

a quadrature demodulation means for inputting said third base-band signal and an output signal from said mixer means.

33. A data receiving system in accordance with claim 32 in which said signal selecting means includes a limiter amplifier and a three-state circuit.

34. A data receiving system in accordance with claim 32 in which said signal selecting means includes an analogue switching circuit and a limiter amplifier.

35. A data receiving system in accordance with claim 32 in which said mixer means includes an exclusive-OR circuit having an input terminal connected to an input terminal of said mixer means and an output terminal connected to an output terminal of the mixer means.

36. A data receiving system in accordance with claim 32 in which said mixer means includes a mixer having a first and a second input terminals and a limiter amplifier, and said first and second input terminals of said mixer are connected to input terminals of the mixer means, and an output signal of said mixer is supplied to said limiter amplifier, and further an output terminal of said limiter amplifier is connected to an output terminal of said mixer means.

37. A data receiving system in accordance with claim 32 in which said standard voltage detecting means includes an edge detecting circuit which detects a sign change of said third base-band signal, a first D-type flip-flop circuit which inputs an output signal from said edge detecting circuit as a clock input signal, and an inverted output signal of said first D-type flip-flop circuit is used as a data input signal of said first D-type flip-flop circuit so that an output signal of said standard voltage detecting means is fed from an output terminal of said first D-type flip-flop circuit whose output is inverted alternately in response to said clock input signal.

38. A data receiving system in accordance with claim 37 in which said edge detecting circuit includes an even number of NOT circuits which delay an input signal of the edge detecting circuit, a second exclusive-OR circuit which compares the input signal of the edge detecting circuit and an output signal of said NOT circuits, and an input terminal of said NOT circuits is connected to an input terminal of said edge detecting circuit and an output terminal of said second exclusive-OR circuit is connected to an output terminal of said edge detecting circuit.

39. A data receiving system in accordance with claim 37 in which said edge detecting circuit includes a third exclusive-OR circuit having a first and a second input terminals, a capacitance element one end of which is connected to a first input terminal of said third exclusive-OR circuit and the other end of which is grounded, a resistance interposed between the first input terminal and a second input terminal of said third exclusive-OR circuit for detecting a current, said second input terminal of the third exclusive-OR circuit being connected to an input terminal of said edge detecting circuit, and said third exclusive-OR circuit having an output terminal connected to an output terminal of said edge detecting circuit.

40. A data receiving system comprising:

a carrier wave signal being modulated with a frequency deviation;

a control signal generating means wherein, a standard voltage detecting means which detects a standard voltage of said first base-band signal and outputs the control signal to said phase-shift switching means;

a phase-shift switching means for switching a phase of the carrier wave signal;

a local oscillator means for generating a local oscillator signal having substantially the same frequency as the carrier wave signal;

a mixer means for mixing said local oscillator signal and an output signal from said phase-shift switching means;

a low-pass filter means for generating a first base-band signal from the output of the mixer means; and

a demodulation means for executing a demodulation operation based on said first base-band signal.

41. A data receiving system in accordance with claim 40 further includes a base-band mixer for mixing said first base-band signal and said control signal and outputting a second base-band signal to said demodulation means so that the demodulation operation can be executed based on said second base-band signal together with said first base-band signal.

42. A data receiving system in accordance with claim 40 further includes a limiter amplifier for inputting said first base-band signal, and the demodulation can be executed based on an output signal from said limiter amplifier.

43. A data receiving system in accordance with claim 40 in which said phase-shift switching means includes a 90°

phase-shift means for shifting a phase of the carrier wave signal by 90° and

an analogue switching means for selecting either the carrier wave signal or an output signal from said 90°

phase-shift means in response to the control signal.

44. A data receiving system in accordance with claim 40 in which said phase-shift switching means includes a phase modulation means for shifting a phase of the carrier wave signal by 0°

or 90°

in response to the control signal.

45. A data receiving system comprising:

an I base-band signal and a Q base-band signal which are used in a quadrature demodulation operation;

a means for detecting a standard voltage of respective base-band signals and generating a control signal in response to this detection;

a means for alternately selecting either said I base-band signal or said Q base-band signal in response to said control signal to generate an I/Q base-band signal; and

a means for executing a demodulation operation on the basis of said I/Q signal.

46. A data receiving system in accordance with claim 45 in which said standard voltage is set to be 0 V.