High resolution graphics system architecture

• US 5,293,480 A
• Filed: 02/01/1993
• Issued: 03/08/1994
• Est. Priority Date: 08/06/1990
• Status: Expired due to Fees

• Current Assignee: AT&T, Inc.
• Original Assignee: AT&T, Inc.
• Inventors: Miller, Robert W., Spicer, John H.
• Primary Examiner(s): Zimmerman, Mark K.
• Application Number:
  US08/013,488
• Time in Patent Office: 400 Days
• Field of Search: 395/163
• US Class Current: 345/502
• CPC Class Codes: G06T 15/005 General purpose rendering architectures

Abstract

A graphics generation system includes a column-interleaved distributed frame buffer and data routing apparatus which directs graphics commands to only a selected group of rendering processing elements (RPEs) required to render a given object to be displayed. In one embodiment, the system specifies this selected group of processing elements using a starting and ending RPE number. This starting and ending RPE number is used to selectively enable only those processing elements needed to process the object data and render the object to be displayed.

Claims

1. A graphics generation system comprising

means for assigning columns of pixels of a prestored image to successive rendering processor elements of a group of processor elements on a cyclically recurring basis,

means for routing object data, representing an object extending over several columns in said image, to selected processor elements of said group of processor elements for concurrent processing thereat, said selected processor elements being selected to include all processor elements necessary to process any scan line of said object, each of said selected processor elements assigned to render a column of pixels of said object, each of said selected processor elements being used to concurrently process all scan lines of said object.

2. The system of claim 1 wherein said routing means comprises

means for determining which columns of pixels are required to render said object on said display and

means for enabling said selected processor elements to receive said object data and one or more system commands.

3. The system of claim 1 wherein said routing means includes means for specifying each selected processor element using a separate control signal.

4. The system of claim 1 wherein said routing means includes

means for routing information specifying a first and a last processor element of said selected processor elements utilized to render said object and

means for decoding said specified first and last processor element information to enable said selected processor elements.

5. The system of claim 4 wherein said decoding means includes lookup table means for identifying each processor element between said specified first and last processor element.

6. The system of claim 5 wherein said lookup table means is a read-only-memory (ROM) device.

7. The system of claim 5 wherein said lookup table means is a preinitialized random-access-memory (RAM) device.

8. The system of claim 1 wherein said assigning means splits the rows of said display into a plurality of segments, each segment containing full, contiguous rows of pixels of said display, each segment utilizing an associated group of rendering processor elements and, within each segment, columns of pixels of said display are assigned to successive processor elements of said associated processor element group on a cyclically recurring basis.

9. The system of claim 1 wherein said assigning means assigns sequential columns of pixels of said image to said successive processor elements such that adjacent columns are assigned to adjacent processor elements.

10. A method of operating a graphics operation system comprising the steps of

assigning columns of pixels of a prestored image to successive rendering processor elements of a group of processor elements on a cyclically recurring basis, and

routing object data, representing an object extending over several columns in said image, to selected processor elements of said processor element group for concurrent processing thereat, said selected processor elements being selected to include all processor elements necessary to process any scan line of said object, each of said selected processor elements assigned to render a column of pixels of said object, each of said selected processor elements being used to concurrently process all scan lines of said object.

11. The method of claim 10 wherein said routing step comprises the steps of

determining which columns of pixels are required to render said object on said display and

enabling said selected processor elements to receive said object data and one or more system commands.

12. The method of claim 11 wherein said determining step includes the step of

specifying each selected processor element using a separate control signal and wherein

said enabling step uses said separate control signal to enable each selected processor element.

13. The method of claim 11 wherein said determining step includes the steps of

specifying a first and a last processor element of said selected processor elements utilized to render said object,

sending an address code identifying said first and last processor elements to said enabling means and wherein

said enabling step includes the step of

decoding said address code and enabling each processor element identified as being between said specified first and last processor element.

14. The method of claim 13 wherein said decoding step decodes said address code by using a lookup table.

15. The method of claim 10 wherein said assigning step splits the rows of said display into a plurality of segments, each segment containing full, contiguous rows of pixels of said display, each segment utilizing an associated group of rendering processor elements and, within each segment, columns of pixels of said display are assigned to successive processor elements of said associated processor element group on a cyclically recurring basis.

16. A display system comprising

means for assigning columns of pixels of a prestored image to successive rendering processor elements of a group of processor elements on a cyclically recurring basis,

means for routing object data, representing an object extending over several columns in said image, to selected processor elements of said group of processor elements for concurrent processing thereat, said selected processor elements being selected to include all processor elements necessary to process any scan line of said object, each of said selected processor elements assigned to render a column of pixels of said object, each of said selected processor elements being used to concurrently process all scan lines of said object,

means for outputting an image signal from said selected processor elements and

means for displaying said output image signal.