Semiconductor device

• US 5,295,044 A
• Filed: 09/25/1992
• Issued: 03/15/1994
• Est. Priority Date: 09/26/1991
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Araki, Kouji, Kojima, Shinjiro, Takahashi, Wataru
• Primary Examiner(s): Tolin, Gerald P.
• Application Number:
  US07/950,899
• Time in Patent Office: 536 Days
• Field of Search: 361/386-389, 361/412, 361/413, 361/395, 361/704, 361/709, 361/712, 361/717, 361/718, 361/719, 361/720, 361/721, 361/735, 361/736, 361/744, 174/52.2, 174/52.4, 257/706, 257/707, 257/712, 257/713 X, 257/686, 257/693, 165/80.3, 165/185, 439/485
• US Class Current: 361/709
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/5385 Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/1627 stacked type assemblies, e.g. stacked multi-cavities
• CPC Class Codes: H01L 2924/19107 off-chip wires
• CPC Class Codes: H05K 7/023 Stackable modules

Abstract

A plurality of circuit boards are used and frames are attached to the circuit boards to surround the peripheral portions thereof. Since connection terminals electrically connected to the respective circuit boards are attached to the respective frames, a semiconductor device having semiconductor elements mounted at high density can be formed by stacking the first and second frames on each other and setting the respective connection terminals in contact with each other to electrically connect the circuit boards to each other.

Claims

1. A semiconductor device comprising:

a first circuit board assembly including a first circuit board on which power semiconductor elements are mounted and a first heat sink, having a first peripheral frame portion, for radiating heat generated by said power semiconductor elements, said first circuit board being fixed on one surface of said first heat sink and within said first peripheral frame portion;

a second circuit board assembly including a second circuit board on which non-power semiconductor elements are mounted and a second heat sink, having a second peripheral frame portion, for radiating heat generated by said non-power semiconductor elements, said second peripheral frame portion of said second circuit board assembly being stacked on said first peripheral frame portion of said first circuit board assembly so as to oppose said first circuit board to said second circuit board;

first electrical connection means formed on said first peripheral frame portion and electrically connected to said first circuit board; and

second electrical connection means formed on said second peripheral frame portion, electrically connected to said second circuit board and electrically connected to said first electrical connection means by stacking said first and second peripheral frame portions on each other.

2. A semiconductor device according to claim 1, wherein said first electrical connection means is formed of first leads, first ends of which project from said first peripheral frame portion and second ends of which are formed as bonding pads used for said first circuit board, said second electrical connection means is formed of second leads first ends of which are provided in a groove formed in said second peripheral frame portion and second ends of which are formed as bonding pads used for said second circuit board, and said first ends of said first leads are set in contact with said first ends of said second leads in said groove to electrically connect said first and second circuit boards to each other.

3. A semiconductor device according to claim 1, wherein said first electrical connection means is formed of first leads which project from said first peripheral frame portion and conductive layers formed on the surface of said first peripheral frame portion to respectively surround said first leads, said second electrical connection means is formed of second leads which are formed on the surface of said second peripheral frame portion and respectively have contact holes, and said first leads are inserted into said groove formed in said second peripheral frame portion via said respective contact holes to respectively set said second leads in contact with said conductive layers and first leads.

4. A semiconductor device according to claim 1, wherein said first peripheral frame portion has a projection and said second peripheral frame portion has a cut-out portion which is engaged with said projection when said first and second peripheral frame portions are stacked on each other so as to securely fix said second frame on said first frame.

5. A semiconductor device according to claim 2, wherein a projection which passes said first leads against said second leads is formed in said groove formed in said second peripheral frame portion.

6. A semiconductor device according to claim 2, wherein said projection engaged with said second leads to prevent said second leads from being removed when said first and second peripheral frame portions are stacked on each other is formed in a preset position of said first leads.

7. A semiconductor device according to claim 1, wherein the other surface of said first heat sink is formed to be exposed outwardly.

8. A semiconductor device according to claim 1, wherein said first heat sink and said second heat sink produce a sealed space into which a protective resin is filled when said first peripheral frame portion of said first heat sink and said second peripheral frame portion of said second heat sink are stacked.

9. A semiconductor device according to claim 8, wherein surfaces of said first peripheral frame portion and said second peripheral frame portion are bonded with a conductive adhesive material.

10. A semiconductor device comprising:

a lowermost circuit board assembly including a lowermost circuit board on which power semiconductor elements are mounted and a lowermost heat sink, having a lowermost peripheral frame portion, for radiating heat generated by said power semiconductor elements, said lowermost circuit board being fixed on one surface of said lowermost heat sink and within said lowermost peripheral frame portion;

an intermediate circuit board assembly of at least one layer including at least one intermediate circuit board on which non-power semiconductor elements are mounted and at least one intermediate peripheral frame portion to which said at least one intermediate circuit board is attached, said at least one peripheral frame portion of said intermediate circuit board assembly being stacked on said lowermost peripheral frame portion of said lowermost circuit board assembly;

an uppermost circuit board assembly including an uppermost circuit board on which power semiconductor elements are mounted and an uppermost heat sink, having an uppermost peripheral frame portion, for radiating heat generated by said power semiconductor elements, said uppermost circuit board being fixed on one surface of said uppermost heat sink and within said uppermost peripheral frame portion, and said uppermost peripheral frame portion of said uppermost circuit board assembly being stacked on said at least one intermediate peripheral frame portion of said intermediate circuit board assembly;

first electrical connection means formed on said lowermost peripheral frame portion and electrically connected to said lowermost circuit board;

second electrical connection means formed on said intermediate peripheral frame portion, electrically connected to said intermediate circuit board and electrically connected to said first electrical connection means; and

third electrical connection means formed on said uppermost peripheral frame portion, electrically connected to said uppermost circuit board and electrically connected to said second electrical connection means.

11. A semiconductor device according to claim 10, wherein said first electrical connection means is formed of first leads first ends of which project from said lowermost peripheral frame portion and second ends of which are formed as bonding pads used for said lowermost circuit board, said second electrical connection means is formed of first leads which project from one surface of said lowermost peripheral frame portion and second leads provided in a groove formed in the opposite surface of said intermediate peripheral frame portion, and said third electrical connection means is formed of third leads first ends of which are provided in a groove formed in said uppermost peripheral frame portion, and said first leads are respectively set in contact with said second leads in said respective grooves to electrically connect said first, second and third circuit boards to one another.

12. A semiconductor device according to claim 10, wherein the other surface of said uppermost and lowermost heat sinks are formed to be exposed outwardly.

13. A semiconductor device according to claim 10, wherein said lowermost heat sink and said uppermost heat sink produce a sealed space into which a protective resin is filled when said lowermost peripheral frame portion said intermediate peripheral frame portion and said uppermost peripheral frame portion are stacked.

14. A semiconductor device according to claim 13, wherein surfaces of said lowermost peripheral frame portion, said intermediate peripheral frame portion and said uppermost peripheral frame portion are bonded with a conductive adhesive material.