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Method of making n-channel and p-channel junction field-effect transistors and CMOS transistors using a CMOS or bipolar/CMOS process

  • US 5,296,409 A
  • Filed: 05/08/1992
  • Issued: 03/22/1994
  • Est. Priority Date: 05/08/1992
  • Status: Expired due to Term
First Claim
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1. A method of fabricating elements of a junction field-effect transistor while simultaneously fabricating the elements of a first metal-oxide-semiconductor transistor and a second metal-oxide-semiconductor transistor having a channel conductivity of the opposite type to the first metal-oxide-semiconductor transistor, the transistors each having a source, a drain, a gate, and a channel region, the method comprising the steps of:

  • (a) providing a substrate (2) of a semiconductor material having a conductivity of a first type and including,(i) a first part, a portion of the first part forming the channel region of the second metal-oxide-semiconductor transistor (3), and(ii) a second part, including a MOS channel well region (13) of a second conductivity type, opposite to the first conductivity type, the MOS channel well region forming the channel region of the first metal-oxide-semiconductor transistor (1);

    (b) introducing an impurity into first selected regions (31,

         33) in the first part of the substrate to form the source and drain of the second metal-oxide-semiconductor transistor, and into a second selected region (35) and a third selected region (37) in the first part of the substrate to form the source and drain, respectively, of the junction field-effect transistor (5), such that the first selected regions, the second selected region, and the third selected region are of the second conductivity type;

    (c) introducing an impurity into a fourth selected region (19), substantially bounded by the third selected region, to form the channel region of the junction field-effect transistor, such that the fourth selected region is of the second conductivity type; and

    (d) introducing an impurity into fifth selected regions (39,

         41) in the MOS channel well region to form the source and drain of the first metal-oxide-semiconductor transistor, and into a sixth selected region (43) between the second selected region and the third selected region to form the gate of the junction field-effect transistor, such that the fifth selected regions and the sixth selected region are of the first conductivity type.

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