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Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry

DC
  • US 5,298,442 A
  • Filed: 09/18/1991
  • Issued: 03/29/1994
  • Est. Priority Date: 12/27/1988
  • Status: Expired due to Term
First Claim
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1. A method for providing a trench DMOS transistor cell, the method comprising the steps of:

  • providing a substrate of semiconductor material of heavily doped first electrical conductivity type having a top surface;

    providing a first covering layer of semiconductor material of first electrical conductivity type having a top surface and being contiguous to and overlying the substrate top surface;

    providing a second covering layer of semiconductor material of second electrical conductivity type having a top surface and being contiguous to the top surface of the first covering layer and extending vertically downward from the top surface of the first covering layer into an upper portion of the first covering layer;

    providing a third covering layer of semiconductor material of heavily doped first electrical conductivity type having a top surface and being contiguous to and partly overlying the top surface of the second covering layer, where a portion of the second covering layer is heavily doped and this portion extends vertically upward through the third covering layer to the top surface thereof and forms an exposed pattern of the second covering layer in the top surface of the third covering layer, and where the maximum depth of the heavily doped portion of the second covering layer relative to the top surface of the third covering layer is a depth d1 ;

    providing a trench having side walls and bottom walls and extending vertically downward from the top surface of the third covering layer through the third and second covering layers and through a portion of, but not all of, the first covering layer, where the trench has a maximum depth relative to the top surface of the third covering layer equal to a second depth d2 and d2 is less than d1, where the trench in horizontal cross section is approximately a polygonal stripe, and where this polygonal stripe laterally surrounds and is spaced apart from the exposed pattern of the second covering layer at the top surface of the third covering layer;

    providing a layer of oxide positioned within the trench and contiguous to the bottom walls and side walls of the trench so that portions, but not all, of the trench are filled with the oxide layer;

    providing electrically conducting semiconductor material, contiguous to the oxide layer and positioned within the trench so that the oxide layer lies between the electrically conducting semiconductor material and the bottom and side walls of the trench; and

    providing three electrodes that are electrically coupled to the electrically conducting semiconductor material in the trench, to the third covering layer and to the substrate, respectively,wherein the difference d1 -d2 of said first and second depths d1 and d2 is sufficient to force junction breakdown away from the trench and into the heavily doped portion of the second covering layer.

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