Method for producing a non-single crystal semiconductor device

• US 5,298,455 A
• Filed: 01/27/1992
• Issued: 03/29/1994
• Est. Priority Date: 01/30/1991
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd., TDK Corporation
• Original Assignee: TDK Corporation
• Inventors: Ikeda, Masaaki, Yamauchi, Yukio, Hiroki, Masaaki, Furukawa, Nobuo, Arai, Michio, Fukada, Takeshi, Sakamoto, Naoya, Sugiura, Kazushi, Takayama, Ichirou, Kodama, Mitsufumi
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): EVERHART, BYRON S
• Application Number:
  US07/825,552
• Time in Patent Office: 792 Days
• Field of Search: 437/2, 437/4, 437/108, 437/109
• US Class Current: 438/59
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 31/1055 the devices comprising amorphous materials of Group IV of the Periodic Table
• CPC Class Codes: H04N 1/0313 Direct contact pick-up heads, i.e. heads having no array of elements to project the scanned image elements onto the photodectors
• CPC Class Codes: H04N 1/0316 illuminating the scanned image elements through the plane of the photodetector, e.g. back-light illumination
• CPC Class Codes: Y10S 257/905 Plural dram cells share common contact or common trench

Abstract

A MOS-FET transistor is produced on a substrate made of glass which has a non single crystal semiconductor film (2'"'"'). The average diameter of a crystal grain in said film is in the range between 0.5 times and 4 times of thickness of said film, and said average diameter is 250 Å-8000 Å , and said film thickness is 500 Å-2000 Å. The density of oxygen in the semiconductor film (2'"'"') is less than 2×10¹⁹ /cm³. A photo sensor having PIN structure is also produced on the substrate, to provide an image sensor for a facsimile transmitter together with the transistors. Said film (2'"'"') is produced by placing amorphous silicon film on the glass substrate through CVD process using disilane gas, and effecting solid phase growth to said amorphous silicon film by heating the substrate together with said film in nitrogen gas atmosphere. The film (2'"'"') thus produced is subject to implantation of dopant for providing a transistor. The film thus produced has high mobility which provides high speed operation of a transistor, and low threshold voltage of a transistor.

Claims

1. A method for producing a non single crystal semiconductor device comprising the steps of;

placing amorphous silicon film on a glass substrate through low pressure CVD process using disilane gas,

effecting solid phase growth to said amorphous silicon film by heating said substrate together with said film in nitrogen gas atmosphere to obtain a film having a thickness in the range 500 Å

to 200 Å

, and crystal grains in said silicon film having an average diameter int he range 250 Å

to 8000 Å

, and an oxygen density in said film of less than 2×

10¹⁹ /cm³,

producing an insulation film on said solid phase growth film,

implanting donor into said solid phase growth film around said insulation film for a source and a drain of a transistor, and

placing a conductive film on said insulation film as a gate electrode.

2. A method according to claim 1, wherein temperature for said solid phase growth is in the range between 550°

C. and 600°

C., and the duration for that solid phase growth is in the range between 8 hours and 56 hours.

3. A method according to claim 1, wherein growth rate of said amorphous silicon film is in the range between 50 Å

/minute and 500 Å

/minute.

4. A method according to claim 1, further comprising the step of depositing a photo sensor which has PIN structure including the steps of;

depositing a first conductive film which has a window for a light path on said substrate adjacent to a transistor area,

depositing amorphous silicon film which has PIN structure selectively on said first conductive film,

depositing second conductive transparent film on said amorphous silicon film, so that a photo-sensor is obtained by said first conductive film, said amorphous silicon film which has PIN structure, and said second conductive film, and

effecting wirings between said photo-sensor and said transistors and external circuitry.