Synchronous logarithmic amplifier
First Claim
1. A logarithmic amplifier (40) comprising:
- a plurality of N serially coupled amplifier stages (14) each having an input and an output, wherein N is an integer greater than one, and wherein the input of a first amplifier stage forms a logarithmic amplifier input;
a plurality of N multiplier stages (26) each having a first input coupled to the output of a corresponding amplifier stage, a second input for receiving a control signal, and an output; and
summing means (24) having a plurality of inputs coupled to the outputs of each of the multiplier stages and an output forming a logarithmic amplifier output.
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Abstract
A synchronous progressive-compression type logarithmic amplifier includes one or two channels of amplifier/limiter stages and a corresponding multi-stage synchronous demodulator circuit to provide low noise and/or low power operation as well as other useful operational modes. A preferred embodiment of the invention includes two channels in which the input of a first amplifier stage in each channel forms a logarithmic amplifier input. The synchronous demodulator circuit is realized as a number of multiplier stages each having a first input coupled to the output of a corresponding amplifier stage in the first channel, a second input coupled to the output of a corresponding amplifier stage in the second channel, and a current output. A current summing bus is coupled to the current outputs of each of the multiplier stages, and forms the logarithmic amplifier output. The output voltage of the logarithmic amplifier can be used directly to provide the instantaneous logarithm of the input signal, or can be filtered to provide the logarithm of the envelope of the input signal.
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Citations
27 Claims
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1. A logarithmic amplifier (40) comprising:
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a plurality of N serially coupled amplifier stages (14) each having an input and an output, wherein N is an integer greater than one, and wherein the input of a first amplifier stage forms a logarithmic amplifier input; a plurality of N multiplier stages (26) each having a first input coupled to the output of a corresponding amplifier stage, a second input for receiving a control signal, and an output; and summing means (24) having a plurality of inputs coupled to the outputs of each of the multiplier stages and an output forming a logarithmic amplifier output. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A logarithmic amplifier (50) comprising:
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a first channel including a plurality of N serially coupled amplifier stages (14A) each having an input and an output, wherein N is an integer greater than one, and wherein the input of a first amplifier stage forms a first channel input of the logarithmic amplifier; a second channel including a plurality of N serially coupled amplifier stages (14B) each having an input and an output, wherein the input of a first amplifier stage in the series of amplifier stages forms a second channel input of the logarithmic amplifier; a plurality of N multiplier stages (27) each having a first input coupled to the output of a corresponding amplifier stage in the first channel, a second input coupled to the output of a corresponding amplifier stage in the second channel, and an output; and summing means (24) having a plurality of inputs coupled to the outputs of each of the multiplier stages and an output forming a logarithmic amplifier output. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. An amplification method comprising the steps of:
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providing a first amplifier channel including a plurality of N serially coupled amplifier stages (14A) each having an input and an output, wherein N is an integer greater than one, and wherein the input of a first amplifier stage forms a first channel input; supplying a first input signal to the first channel input; providing a second channel including a plurality of N serially coupled amplifier stages (14B) each having an input and an output, wherein the input of a first amplifier stage in the series of amplifier stages forms a second channel input; supplying a second input signal to the second channel input; multiplying a signal at the output of an amplifier stage in the first channel together with a signal at the output of a corresponding amplifier stage in the second channel to provide a plurality of N outputs; and summing the outputs of each of the multiplier stages to provide an output signal. - View Dependent Claims (23, 24, 25, 26, 27)
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Specification