Interference nulling system for antennas

• US 5,298,908 A
• Filed: 11/27/1987
• Issued: 03/29/1994
• Est. Priority Date: 11/27/1987
• Status: Expired due to Fees

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Unisys Corporation
• Inventors: Piele, Gerald H.
• Primary Examiner(s): Blum, Theodore M.
• Application Number:
  US07/125,832
• Time in Patent Office: 2,314 Days
• Field of Search: 342/361, 342/362, 342/363, 342/365, 455/304
• US Class Current: 342/363
• CPC Class Codes: H01Q 3/2611 Means for null steering; Adaptive interference nulling
• CPC Class Codes: H04B 7/10 Polarisation diversity; Directional diversity

Abstract

An interference nulling system is provided which nulls out all types of interference signals received in different lobes of the receiving antenna. The data to be received is transmitted from a high quality circular polarized transmitter antenna having the same polarization as the data receiving port of the receiving antenna. The receiving antenna also has a receiving port whose circular polarization is orthogonal to the antenna port receiving the data so that this latter channel contains only interference signals. The interference signals in this latter channel are correlated with the interference components in the data channel. A control loop is employed to adaptively adjust the phase (or delay) and amplitude of the sample of the interference signal and the adaptively adjusted interference signal is subtracted from the data signal which contains some of the interference signals, thus, providing a clean data signal.

Claims

1. An interference nulling system for antennas comprising:

a receiving antenna of the type having a pair of receiving ports for receiving right hand circular polarized signals and left hand circular polarized signals,

converter means in said antenna for converting said circular polarized signals at said ports into linear polarized signals,

a primary signal channel connected to the receiving port for receiving primarily desired data link signals plus some interference signals,

said primary signal channel comprising signal processing means and a summing circuit having an output coupled to a receiver,

an interference nulling channel connected to the other receiving port and to said summing circuit for receiving only interference signals and no data link signals and for applying processed interference signals to an input of said summing circuit and for producing an optimized clean desired data link signal output from said summing circuit substantially free of interference signals,

said interference nulling channel comprising a power divider, adjustable phase control means and adjustable amplitude control means connected in series,

an interference nulling control loop connected between said power divider and said adjustable phase control means and between said power divider and said adjustable amplitude control means having an adaptive controller for adjusting the phase and amplitude of said processed interference signals applied to the input of said summing circuit;

error detecting means connected in series in said nulling control loop and having an error signal output connected to said adaptive controller, and

primary signal channel sampling means coupled to the output of said summing circuit and to an input of said error detecting means for generating an error signal output from said error detecting means which is applied as an input to said adaptive controller indicative of the phase and amplitude of said interference signal in said primary signal channel.

2. An interference nulling system as set forth in claim 1 wherein said receiving antenna comprises a high quality polarizer antenna.

3. An interference nulling system as set forth in claim 2 wherein said received right hand polarized signal are high quality non-elliptical signals.

4. An interference nulling system as set forth in claim 1 wherein said interference nulling control loop and said primary signal channel sampling means both comprise a mixer and a down converter driven by a single local oscillator.

5. An interference nulling system as set forth in claim 4 wherein said error detecting means in said interference nulling control loop comprises a mixer.

6. An interference nulling system as set forth in claim 1 wherein said error detecting means in said interference nulling control loop comprises a double balanced mixer wired to provide a correlator.

7. An interference nulling system as set forth in claim 1 wherein said summing circuit comprises a directional coupler.

8. An interference nulling system as set forth in claim 1 wherein said receiving ports comprise a coaxial hybrid ring connected to said receiving antenna.

9. An interference nulling system as set forth in claim 1 where said receiving ports comprise magic T waveguides connected to said receiving antenna.

10. An interference nulling system as set forth in claim 1 wherein said adjustable amplitude control means comprise a ferrite attenuator.

11. An interference nulling system as set forth in claim 1 wherein said adjustable amplitude control means comprises a pin diode attenuator.

12. An interference nulling system as set forth in claim 1 wherein said adjustable phase control means comprises a tapped delay line.

13. An interference nulling system as set forth in claim 1 wherein said primary signal channel comprises a plurality of summing circuits in series, the last of which is provided with the output coupled to said receiver.

14. An interference nulling system as set forth in claim 13 wherein said interference nulling channel comprises a plurality of series connected adjustable phase control means and adjustable amplitude control means, each being parallel connected between said power divider and one of said plurality of said summing circuits.

15. An interference nulling system as set forth in claim 14 wherein said interference nulling control loop error detecting means comprises a plurality of error detectors, one for each summing circuit and said series connected adjustable phase control means and adjustable amplitude control means.

16. An interference nulling system as set forth in claim 15 wherein said adaptive controller further comprise a plurality of adaptive controllers, one for each error detector.

17. An interference nulling system as set forth in claim 16 wherein said sampling means coupled to the input of said error detecting means comprises a plurality of different pass band pass filters, the output of each one being connected as an input one of said detectors.

18. A method of removing interference signal from desired data link signals, comprising the steps of transmitting high quality right hand circular polarized data link signals to a receiver,

receiving said high quality transmitted right hand circular polarized data link signals at a high quality receiver having an antenna port adapted to receive only right hand circular polarized signals, said received data link signals containing some interference signals,

receiving only intereference signals at a receiver antenna port adapted to receive only left hand circular polarized signals,

processing said received interference signals in an interference channel connected to an input of a summing circuit,

processing said received data link signals containing some interference signals in a primary signal channel connected to another input of said summing circuit,

taking a sample of the interference signals in said primary signal channel free of said data link signals and applying them to an error detector,

taking a divided portion of the processed interference signals in said interference channel and applying them to said error detector to produce at the output of said error detector an error signal,

applying said error signal to an adaptive controller, and

coupling the output of said adaptive controller to adjustable phase and amplitude control means in said interference channel to correlate the interference signal input to said summing circuit with the residual interference signal in said primary signal channel input to said summing circuit to provide an optimized clean data link signal output from said summing circuit.