Rest/activity phase-responsive rate controlled cardiac pacer

• US 5,300,092 A
• Filed: 03/16/1993
• Issued: 04/05/1994
• Est. Priority Date: 11/29/1989
• Status: Expired due to Term

• Current Assignee: Biotronik Mess-Und Therapiegeraete GmbH & Company Ingenieurbuero Berlin (Biotronik SE & Company KG)
• Original Assignee: Biotronik Mess-Und Therapiegeraete GmbH & Company Ingenieurbuero Berlin (Biotronik SE & Company KG)
• Inventors: Schaldach, Max
• Primary Examiner(s): Kamm, William E.
• Application Number:
  US08/031,920
• Time in Patent Office: 385 Days
• Field of Search: 128/419 PG
• US Class Current: 607/18
• CPC Class Codes: A61N 1/36542 controlled by body motion, e.g. acceleration

Abstract

A rate controlled cardiac pacemaker stimulates the heart of a patient at a stimulation rate and includes a stress sensor for sensing actual physical stress of the patient. The device includes control logic for adapting the stimulation rate of the pacemaker to the actual physical stress of the patient and determining circuitry for determining the activity of the patient. The determining circuitry includes an activity sensor for sensing the activity state of the patient and a rate control circuit having an input connected with an output of the activity sensor. A timer generates a signal based on a 24-hour rhythm indicating a rest phase or an activity phase, and is synchronized by the activity sensor in a 24-hour rhythm with patient activity and rest phases that occur in continuous alternation. The activity sensor, in the case of the absence of activity or low activity of the patient over a long period of time, or in the case of activity which exceeds a predetermined level, respectively, emits an output signal to an input of the timer for synchronizing the timer. The timer generates the signal based on the 24-hour rhythm indicating a rest phase or an activity phase, respectively, independently of the signal from the activity sensor, with a change between an activity and a rest phase, on the average, following a change of the output signals of the activity sensor picked up during a preceding time period.

Claims

1. A rate controlled cardiac pacemaker comprising:

stimulating means for stimulating the heart of a patient at a stimulation rate;

a stress sensor for sensing actual physical stress of the patient;

logic control means coupled with the stimulating means and the stress sensor, for adapting the stimulation rate to the actual physical stress of the patient;

determining means coupled with the logic control means, for determining the activity of the patient, said determining means including an activity sensor for sensing the activity state of the patient, said activity sensor having an output, and a rate control circuit having an input connected with the output of the activity sensor; and

timer means coupled with the determining means, for generating a timer output signal based on a 24-hour rhythm indicating a rest phase or an activity phase, synchronized by said activity sensor in a 24-hour rhythm with patient activity and rest phases that occur in continuous alternation, said activity sensor, in the case of the absence of activity or low activity of the patient over a long period of time, or in the case of activity which exceeds a predetermined level, respectively, emitting an output signal to an input of said timer means for synchronizing the timer means, said timer means generating the timer output signal based on the 24-hour rhythm indicating a rest phase or an activity phase, respectively, independently of the signal from said activity sensor, with a change between an activity and a rest phase, on the average, following a change of the output signals of the activity sensor picked up during a preceding time period.

2. A cardiac pacemaker according to claim 1, wherein said determining means comprises:

a phase-locked-loop circuit including a voltage controlled oscillator having at least one input,

wherein the output signal of the activity sensor provides a reference frequency for the at least one input of the voltage controlled oscillator of the phase-locked-loop circuit.

3. A cardiac pacemaker according to claim 2, wherein the phase-locked-loop circuit voltage controlled oscillator operates at a low frequency that lies in the frequency range of an activity/rest rhythm.

4. A cardiac pacemaker according to claim 3, further comprising a controllable switch connected between said rate control circuit and an external supply voltage,

wherein the voltage controlled oscillator generates a control signal for controlling the controllable switch, the controllable switch connecting and disconnecting said rate control circuit to the external supply voltage.

5. A cardiac pacemaker according to claim 4, further comprising an additional sensor and an AND gate means connected to receive the timer output signal from the timer means and an output signal of the additional sensor,

wherein the timer output signal of the timer means is linked in a logical AND relationship by the AND gate means with the output signal of said additional sensor so that a signal characteristic of the activity phase of the patient is output only if a signal characterizing a change in at least one of motion and position of the patient from said additional sensor coincides with the timer output signal from the timer means characterizing an activity phase.

6. A cardiac pacemaker according to claim 1, further comprising evaluation means for receiving input from the activity sensor and input from the timer means, and having an evaluation threshold to be exceeded, for evaluation of patient activity signals from said activity sensor, said evaluation threshold being raised during a patient rest phase.

7. A cardiac pacemaker according to claim 1, further comprising switching means, connected to said timer means, for periodically switching on said logic control means, wherein during a patient rest phase, said logic control means is switched on a reduced number of times by said switching means.

8. A cardiac pacemaker according to claim 7, wherein during the rest phase, said logic control means is switched on by said switching means a reduced number of times;

whenever said determining means for determining the patient'"'"'s activity outputs an output signal,

whenever a predetermined minimum activity is not reached for a predetermined minimum time period as determined by said determining means, or

whenever the sum of these time periods exceeds a predetermined value within a predetermined time interval.

9. A cardiac pacemaker according to claim 1, wherein said determining means comprises:

an event memory having addressable memory locations therein,

wherein the output signal of the activity sensor provides an event signal to be retained in said memory locations of said event memory means, and

wherein said event memory means periodically, in a 24-hour cycle, addresses said memory locations therein for said event signal and provides the output signal to said voltage controlled oscillator, thereby performing time dependent control that can be synchronized in a 24-hour rhythm.

10. A cardiac pacemaker according to claim 9, wherein the phase-locked-loop circuit voltage controlled oscillator operates at a low frequency that lies in the frequency range of an activity/rest rhythm.

11. A cardiac pacemaker according to claim 10, further comprising a controllable switch connected between said rate control circuit and an external supply voltage,

wherein the voltage controlled oscillator generates a control signal for controlling the controllable switch, the controllable switch connecting and disconnecting said rate control circuit to the external supply voltage.

12. A cardiac pacemaker according to claim 11, wherein said event memory means comprises an integrating memory which generates a voltage value that is proportional to a pulsing ratio of the activity/rest rhythm, the voltage value generated by the integrating memory adapting a pulsing ratio of the frequency of the voltage controlled oscillator to a day to night ratio.

13. A cardiac pacemaker according to claim 12, further comprising an additional sensor and an AND gate means connected to receive the timer output signal from the timer means and an output signal of the additional sensor,

wherein the timer output signal of the timer means is linked in a logical AND relationship by the AND gate means with the output signal of said additional sensor so that a signal characteristic of the activity phase of the patient is output only if a signal characterizing a change in at least one of motion and position of the patient from said additional sensor coincides with the timer output signal from the timer means characterizing an activity phase.

14. An evaluation circuit for detecting changes in a patient day/night activity and producing a control signal for switching off a rate control system for a cardiac pacemaker, the evaluation circuit comprising:

an activity sensor for providing signals to the rate control system;

a decoder operatively coupled to receive signals from the rate control system and produce a reference frequency signal output;

a phase locked loop circuit for receiving the reference frequency signal from the decoder and producing a control signal; and

a controllable switch coupled between the rate control system and a power source, the controllable switch further coupled to said phase locked loop circuit and being controlled by the control signal from said phase locked loop circuit.

15. The evaluation circuit according to claim 14, further comprising an integrating memory for generating a voltage that is proportional to a patient pulsing ratio between day and night and providing the voltage to said phase locked loop circuit to adapt a frequency of said phase locked loop circuit between day and night values.

16. The evaluation circuit according to claim 15, further comprising an additional sensor, the additional sensor being one of a position and a motion sensor, and a selector switch wherein the selector switch is coupled to the rate control system, the decoder and the additional sensor, for switching signals to the detector from either the rate control system or the additional sensor.

17. The evaluation circuit according to claim 14, wherein the phase locked loop circuit comprises:

a phase comparator for receiving a first and a second input signal, the first input signal being the reference frequency signal output by the decoder and providing a comparison signal output;

a low pass filter for receiving the comparison signal from the phase comparator and producing a filtered output signal;

a voltage controlled oscillator for receiving the filtered output signal from the low pass filter and producing the control signal; and

a divider for receiving the control signal from the voltage controlled oscillator and providing the second input signal to the phase comparator.

18. A rate controlled cardiac pacemaker comprising:

controllable output means for stimulating a patient heart with electrical signals;

control means for controlling the output means;

amplifier means for receiving and amplifying signals from the patient heart;

detection means for receiving the amplified signals from the amplifying means and providing detection signals;

rest phase switch means for detecting phases of physical activity and rest of a patient and producing activity signals; and

logic control means for receiving the activity signals from said rest phase switch means and the detection signals from said detection means, and providing control signals to said control means.