UHF/VHF plasma for use in forming integrated circuit structures on semiconductor wafers
First Claim
1. A low presure plasma-assisted RIE process for anisotropically etching silicon oxide in the fabrication of integrated circuit devices on semiconductor wafers characterized by the generation, in a vacuum etching chamber, of a plasma using a power source having a frequency range of from about 100 MHz up to about 250 MHz to provide a sheath voltage low enough to avoid risk of damage to devices on said wafer during said etching and maintained at a power density level ranging from about 30 to about 76 watts/inch2 of wafer area, while flowing one or more fluorine-containing gases and one or more carbon-containing gases into said vacuum etching chamber containing an anode and a wafer mounted on a cathode and maintained at a pressure within a range of from about 2 to about 500 milliTorr to provide a silicon oxide etch rate of from about 0.3 to 0.75 microns/minute.
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Accused Products
Abstract
An improved method of fabricating integrated circuit structures on semiconductor wafers using a plasma-assisted process is disclosed wherein the plasma is generated by a VHF/UHF power source at a frequency ranging from about 50 to about 800 MHz. Low pressure plasma-assisted etching or deposition processes, i.e., processes may be carried out within a pressure range not exceeding about 500 milliTorr; with a ratio of anode to cathode area of from about 2:1 to about 20:1, and an electrode spacing of from about 5 cm. to about 30 cm. High pressure plasma-assisted etching or deposition processes, i.e., processes may be carried out with a pressure ranging from over 500 milliTorr up to 50 Torr or higher; with an anode to cathode electrode spacing of less than about 5 cm. By carrying out plasma-assisted processes using plasma operated within a range of from about 50 to about 800 MHz, the electrode sheath voltages are maintained sufficiently low, so as to avoid damage to structures on the wafer, yet sufficiently high to preferably permit initiation of the processes without the need for supplemental power sources. Operating in this frequency range may also result in reduction or elimination of microloading effects.
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Citations
26 Claims
- 1. A low presure plasma-assisted RIE process for anisotropically etching silicon oxide in the fabrication of integrated circuit devices on semiconductor wafers characterized by the generation, in a vacuum etching chamber, of a plasma using a power source having a frequency range of from about 100 MHz up to about 250 MHz to provide a sheath voltage low enough to avoid risk of damage to devices on said wafer during said etching and maintained at a power density level ranging from about 30 to about 76 watts/inch2 of wafer area, while flowing one or more fluorine-containing gases and one or more carbon-containing gases into said vacuum etching chamber containing an anode and a wafer mounted on a cathode and maintained at a pressure within a range of from about 2 to about 500 milliTorr to provide a silicon oxide etch rate of from about 0.3 to 0.75 microns/minute.
- 9. A plasma-assisted high pressure process for etching silicon oxide in the fabrication of integrated circuit devices on semiconductorb wafers characterized by the generation, in a vacuum etching chamber, of a plasma using one or more power sources having a frequency range of from about 100 MHz up to about 200 MHz to provide a sheath voltage low enough to avoid risk of damage to devices on said wafer during said etching and maintained at a power density level ranging from about 30 to about 50 watts/inch2 of wafer area, while flowing one or more fluorine-containing gases and one or more carbon-containing gases into said vacuum etching chamber containing an anode and a wafer mounted on a cathode spaced from said anode a distance ranging from about 0.2 to less than about 5 cm., said vacuum chamber maintained at a pressure within a range of over 500 milliTorr to about 50 Torr to provide a silicon oxide removal rate of about 0.2 to about 1 micron/minute.
- 13. A plasma-assisted low pressure CVD process for depositing materials selected from the group consisting of silicon oxide and silicon nitride used in the fabrication of integrated circuit devices on semiconductor wafers characterized by the generation, in a vacuum deposition chamber of a plasma using one or more power sources having a frequency range of from about 100 MHz up to about 250 MHz to provide a sheath voltage low enough to avoid risk of damage to devices on said wafer during said deposition process and maintained at a power density level ranging from about 30 to about 76 watts/inch2 of wafer area in a vacuum deposition chamber containing an anode and a wafer mounted on a cathode spaced from said anode a distance of from about 5 to about 30 cm., said vacuum chamber maintained at a pressure within a range of from about 2 to about 500 milliTorr to provide a deposition rate of from about 0.1 to about 1.5 microns/minute.
- 18. A plasma-assisted high pressure CVD conformal isotropic process for depositing materials selected from the group consisting of silicon oxide and silicon nitride used in the fabrication of integrated circuit devices on semiconductor wafers characterized by the generation, in a vacuum deposition chamber of a plasma using one or more power sources having a frequency range of from about 150 MHz up to about 800 MHz to provide a sheath voltage low enough to avoid risk of damage to devices on said wafer during said deposition process and maintained at a power density level ranging from about 10 to about 38 watts/inch2 of wafer area in a vacuum etching chamber containing an anode and a wafer mounted ona cathode spaced from said anode a distance of from about 0.2 to about 5 cm., said vacuum chamber maintained at a pressure within a range of over 500 milliTorr to about 50 Torr to provide a deposition rate of from about 0.5 to about 1.0 microns/minute.
- 22. A low pressure plasma-assisted RIE process for anisotropically etching a material selected from the group consisting of aluminum and polysilicon in the fabrication of integrated circuit devices on semiconductor wafers characterized by the generation, in a vacuum etching chamber, of a plasma using a power source having a frequency range of from about 150 MHz up to about 600 MHz to provide a sheath voltage low enough to avoid risk of damage to devices on said wafer during said etching and maintained at a power density level ranging from about 20 to about 40 watts/inch2 of wafer area, while flowing a mixture of one or more chlorine-containing gases and one or more inert gases into said vacuum etching chamber containing an anode and a wafer mounted on a cathode and maintained at a pressure within a range of from about 2 to about 500 milliTorr to provide an aluminum or polysilicon etch rate of froma bout 0.2 to about 1 microns per minute.
- 25. A plasma-assisted high pressure process for etching a material selected from the group consisting of aluminum and polysilicon in the fabrication of integrated circuit devices on semiconductor wafers characterized by the generation, in a vacuum etching chamber, of a plasma using one or more power sources having a frequency range of from about 100 MHz up to about 200 MHz to provide a sheath voltage low enough to avoid risk of damage to devices on said wafer during said etching and maintained at a power density level ranging from about 20 to about 40 watts/inch2 of wafer area, while flowing one or more chlorine-containing gases and one or more inert gases into said vacuum etching chamber containing an anode and a wafer mounted on a cathode psaced from said anode a distance ranging from about 0.2 to less than about 5 cm., said vacuum chamber maintained at a pressure within a range of over 500 milliTorr to about 50 Torr to provide an aluminum or polysilicon removal rate of about 0.2 to about 1 micron/minute.
Specification