Semiconductor device having improved vertical insulated gate type transistor

• US 5,302,846 A
• Filed: 12/08/1992
• Issued: 04/12/1994
• Est. Priority Date: 06/04/1990
• Status: Expired due to Fees

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Matsumoto, Shigeyuki
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): LOKE, STEVEN HO YIN
• Application Number:
  US07/986,890
• Time in Patent Office: 490 Days
• Field of Search: 357/23.1, 357/23.11, 357/55, 257/329, 257/330, 257/412, 257/734
• US Class Current: 257/329
• CPC Class Codes: H01L 21/76879 by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating plating on semiconductors in general H01L21/288
• CPC Class Codes: H01L 29/4232 with insulated gate
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence

Abstract

A semiconductor device is provided having an insulated gate type transistor comprising a semiconductor body. First and second semiconductor regions define source and drain regions buried in the semiconductor body. A third semiconductor region defines a channel region disposed between the first and second semiconductor regions. A recess is provided having a bottom surface and a side surface. The recess is formed in the semiconductor body and is provided adjacent to the third semiconductor region. An insulating film is formed on the entire side surface of the recess, and a gate electrode comprising a metallic region is provided in the recess. The first, second and third regions, the gate electrode region and the insulating film are juxtaposed in a direction along a main face of the semiconductor body. The insulating film and the gate electrode region substantially occupy the recess.

Claims

1. A semiconductor device comprising:

a semiconductor body having a recess formed therein;

an impurity doped region formed within said semiconductor body;

a gate electrode region provided directly on said impurity doped region and filling said recess formed in said semiconductor body;

first and second semiconductor regions having said gate electrode region sandwiched therebetween, said first and second semiconductor regions being positioned on a surface of said semiconductor body and defining a source region and a drain region;

an insulating film provided between said gate electrode region and a portion of said semiconductor body;

a first channel constituting a first path at least partly in a direction substantially perpendicular to said surface and within said semiconductor body through which carriers flow into said second semiconductor region through said impurity doped region from said first semiconductor region; and

a second channel constituting a second path in a direction along said surface of said semiconductor body through which carriers flow into said second semiconductor region from said first semiconductor region.

2. A semiconductor device according to claim 1, wherein said gate electrode region includes an aluminum electrode.

3. A semiconductor device according to claim 2, wherein said aluminum electrode is made of a monocrystalline aluminum.