Plastic and grid array semiconductor device and method for making the same

• US 5,302,849 A
• Filed: 03/01/1993
• Issued: 04/12/1994
• Est. Priority Date: 03/01/1993
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Cavasin, Daniel
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): CLARK, SHEILA V
• Application Number:
  US08/024,060
• Time in Patent Office: 407 Days
• Field of Search: 257/676, 257/666, 257/787, 257/696, 257/697
• US Class Current: 257/666
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/4951 Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
• CPC Class Codes: H01L 23/49551 characterised by bent parts
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/07811 Extrinsic, i.e. with electrical conductive fillers

Abstract

A plastic land grid array semiconductor device (30) can be manufactured using conventional techniques. In one embodiment, a semiconductor die (12) having an active surface is provided. An LOC leadframe (14) is provided, wherein leads (16) have a horizontal portion (18) and a vertical portion (20). The active surface of the die is attached to the leads with an LOC tape (17) and is electrically connected to the horizontal portion by wire bonds (24). A plastic package body (32) is molded around the die, the wire bonds, and a portion of the leadframe. The vertical portion of the leads terminates and its thickness is exposed at a surface of the package body, thus forming a grid array of external electrical contacts. An insulative material (34) is coated on the sides of the package body to cover any exposed thickness of the horizontal portion of the leads.

Claims

1. A plastic land grid array semiconductor device comprising:

a leadframe having a plurality of L-shaped leads, the plurality of L-shaped leads having a horizontal portion and a vertical portion, both portions having a thickness;

a semiconductor die having a plurality of pads on an active surface which is electrically connected to the horizontal portion of the plurality of L-shaped leads, wherein the horizontal portion originates in proximity to an edge of the semiconductor die, extends over the active surface toward the plurality of pads, and terminates with the vertical portion angling away from the semiconductor die;

a plastic package body covering at least the active surface of the semiconductor die and a portion of the plurality of leads, wherein the vertical portion of the plurality of leads terminates at a surface of the plastic package body, said surface being substantially parallel to the active surface of the semiconductor die; and

an insulative coating on an external side portion of the plastic package body to cover any exposed thickness of the horizontal portion of the plurality of leads;

wherein the thickness of the vertical portion of the plurality of leads is exposed on the surface of the plastic package body to form a grid array of external electrical contacts.

2. The device of claim 1, wherein the plurality of pads on the active surface of the semiconductor die is electrically connected to the horizontal portion of the plurality of leads by a plurality of wire bonds.

3. The device of claim 1, wherein the grid array of external electrical contacts is a peripheral array.

4. The device of claim 1, wherein the plurality of pads on the active surface of the semiconductor die is electrically connected to the horizontal portion of the plurality of leads by an anisotropic conductive adhesive.

5. The device of claim 4, wherein the grid array of external electrical contacts is an area array.

6. The semiconductor device of claim 1, wherein the plastic package body comprises an resin encapsulant.

7. A plastic land grid array semiconductor device comprising:

a semiconductor die having a plurality of bonding pads on an active surface;

a leadframe having a plurality of L-shaped leads, the plurality of L-shaped leads having a horizontal portion and a vertical portion, both portions having a thickness, wherein the horizontal portion originates in proximity to an edge of the semiconductor die, extends over the active surface toward the plurality of bonding pads, and terminates with the vertical portion angling away from the active surface of the semiconductor die;

a plurality of wire bonds connecting the active surface of the semiconductor die to the horizontal portion of the plurality of L-shaped leads;

a plastic package body covering at least the active surface of the semiconductor die, the plurality of wire bonds, and a portion of the plurality of leads, wherein the vertical portion of the plurality of leads terminates at a surface of the plastic package body, said surface being substantially parallel to the active surface of the semiconductor die; and

an insulative coating on an external side portion of the plastic package body to cover any exposed thickness of the horizontal portion of the plurality of leads;

wherein the thickness of the vertical portion of the plurality of leads is exposed on the surface of the plastic package body to form a grid array of external electrical contacts.

8. The semiconductor device of claim 7, wherein the vertical portion of the plurality of leads is angled away from the semiconductor die at substantially 90 degrees from the active surface of the semiconductor die.

9. The semiconductor device of claim 7, wherein a portion of an inactive surface of the semiconductor die is exposed.

10. The semiconductor device of claim 9 further comprising:

a heat sink attached to the portion of the inactive surface of the semiconductor die.

11. The semiconductor device of claim 7, wherein the grid array of external electrical contacts is a peripheral array.

12. A plastic land grid array semiconductor device comprising:

a semiconductor die having a plurality of bonding pads on an active surface;

a leadframe having a plurality of L-shaped leads, the plurality of L-shaped leads having a horizontal portion and a vertical portion, both portions having a thickness, wherein the horizontal portion extends over the active surface of the semiconductor die from an edge of the semiconductor die toward the plurality of bonding pads and the vertical portion is angled away from the semiconductor die;

an anisotropic conductive adhesive coupling the plurality of bonding pads on the active surface of the semiconductor die and the horizontal portion of the plurality of leads of the leadframe to electrically connect the semiconductor die to the leadframe;

a plastic package body covering at least the active surface of the semiconductor die, the anisotropic adhesive, and a portion of the plurality of leads, wherein the vertical portion of the plurality of leads terminates at a surface of the plastic package body, said surface being substantially parallel to the active surface of the semiconductor die; and

an insulative coating on an external side portion of the plastic package body to cover any exposed thickness of the horizontal portion of the plurality of leads;

wherein the thickness of the vertical portion of the plurality of L-shaped leads is exposed on the surface of the plastic package body to form a grid array of external electrical contacts.

13. The semiconductor device of claim 13, wherein the grid array of external electrical contacts is an area array.

14. The semiconductor device of claim 13, wherein the vertical portion of the plurality of leads is angled away from the semiconductor die at substantially 90 degrees from the active surface of the semiconductor die.

15. The semiconductor device of claim 13, wherein a portion of an inactive surface of the semiconductor die is exposed and wherein a heat sink is attached to the portion of the inactive surface.