Technology independent integrated circuit mask artwork generator

• US 5,303,161 A
• Filed: 12/10/1990
• Issued: 04/12/1994
• Est. Priority Date: 12/10/1990
• Status: Expired due to Term

• Current Assignee: Microelectronics Technology Inc (MTI Laboratory Inc)
• Original Assignee: Hughes Aircraft Company (Rtx Corporation)
• Inventors: Burns, Richard J., Mehranfar, Stacy W.
• Primary Examiner(s): Trans, Vincent N.
• Application Number:
  US07/624,958
• Time in Patent Office: 1,219 Days
• Field of Search: 364/488, 364/489, 364/490, 364/491
• US Class Current: 716/55
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Abstract

An integrated circuit mask artwork generator (10) is disclosed which can define relationships between individual components and which is also independent of the technology chosen. An artwork library database (58) is provided which contains macros each macro being capable of generating artwork for one of the electrical components of the particular technology type. A device generator (18) is provided for defining the type of circuit to be executed and for executing the macro for that circuit independent of the component'"'"'s particular technology type. A means for defining relationships between the circuits (16) is provided with the relationships specified desirable physical relationships between sets of related circuit components. In conjunction with the schematic this provides a schematic with relationship annotations (14). A means for determining placement of the components (20) is provided which includes a means for determining the placement groups where the groups consist of groups of components with related placements based on the defined relationships. In addition, the system (10) includes a means for arranging the components (20) so as to optimize a predetermined parameter. The means for determining placement ( 20) also eliminates overlaps between the components by moving the groups as a whole so as to preserve defined relationships. Finally, a router (22) routes the electrical connections between the placed components.

Claims

1. A system for generating integrated circuit mask artwork from a schematic of an electrical circuit, said electrical circuit containing electrical components and connections between said components, said system comprising:

artwork library database containing macros, each of which generate artwork for one of said electrical components of a particular technology type, wherein said components are identified by a component designator;

device generator means for defining the type of circuit to be executed and for executing the macro for that circuit independent of the component'"'"'s particular technology type;

means for defining relationships between said circuits, said relationships specifying desirable physical relationships between sets of related circuit components which influence their performance;

means for determining placement of said components on said artwork including means for determining placement groups, the groups consisting of groups of components with related placements based on said defined physical relationships;

means for arranging said components so as to optimize a predetermined parameter, the parameter being a function of the physical relationship between the components;

means for eliminating overlaps between said components by moving said groups as a whole wherein said defined relationships are preserved; and

means for routing the electrical connections between said placed components.

2. The system of claim 1 wherein said means for defining relationships defines matched, and mirrored components.

3. The system of claim 1 wherein said predetermined parameter is a connectivity cost based on predetermined features including connection length and wherein said means for determining placement includes:

means for building a connectivity matrix representing the cost of connecting each component with the other components to which its connected, said cost being a function of predetermined factors including connection length;

means for ordering the components according to their connection costs;

means for trying out various possible placements of said components starting with the components having the highest cost and arranging all other components at a position relative to that component, and their determining the total placement cost;

means for repeating the arrangement of components starting with the next higher cost component in said ordering until the arrangement with the lowest total cost is determined; and

means for placing components within each placement group according to the weighted average of the coordinates of the placed objects to which it is connected to minimize the distance between said components within said group.

4. The system of claim 1 wherein said predetermined parameter is total layout area, and wherein said means for determining placement includes:

means for ordering said placement group according to decreasing layout area;

means for positioning the group so that components are in the same relative positions as in the schematic; and

means for placing components within a group so that components are in the same relative position as in the schematic.

5. The system of claim 1 wherein said means for routing includes:

means for creating abstract representations of each component; and

means for determining a routing weight for each connection between said components wherein said means for routing, routes components having higher weights first.

6. The system of claim 1 wherein said means for routing includes a zero width routing means for routing said interconnections as if said interconnections had no width, and a compactor means for moving components apart after routing to create sufficient space for these interconnections.

7. A system for generating integrated circuit mask artwork from a schematic of an electrical circuit, said electrical circuit containing electrical components and connections between said components, said system comprising:

artwork library database containing macros, each of which generate artwork for one of said electrical components of a particular technology type, wherein said components are identified by a component designator;

device generator means for defining the type of circuit to be executed and for executing the macro for that circuit independent of the component'"'"'s particular technology type;

means for defining relationships between said circuits, said relationships specifying matched and mirrored relationships between sets of related circuit components;

means for determining placement of said components on said artwork including means for determining placement groups, the groups consisting of groups of components with related placements based on said defined relationships, means for building a connectivity matrix representing the cost of connecting each component with the other components to which its connected, said cost being a function of predetermined factors including connection length;

means for ordering the components according to their connection costs;

means for trying out various possible placements of said components starting with the components having the highest cost and arranging all other components at a position relative to that component, and their determining the total placement cost;

means for repeating the arrangement of components starting with the next higher cost component in said ordering until the arrangement with the lowest total cost is determined;

means for placing components within each placement group according to the weighted average of the coordinates of the placed objects to which it is connected to minimize the distance between said components within said group;

means for arranging said components so as to optimize a predetermined parameter;

means for eliminating overlaps between said components by moving said groups as a whole wherein said defined relationships are preserved; and

means for routing the electrical connections between said placed components.

8. A method for generating integrated circuit mask artwork from a schematic of an electrical circuit, said electrical circuit containing electrical components and connections between said components, said method comprising:

generating an artwork library database containing macros, each of which generate artwork for one of said electrical components of a particular technology type, wherein said components are identified by a component designator;

defining the type of circuit to be executed and executing the macro for that circuit independent of the component'"'"'s particular technology type;

defining relationships between said circuits, said relationships specifying desirable physical relationships between sets of related circuit components which influence their performance;

determining placement of said components on said artwork including the step of determining placement groups, the groups consisting of groups of components with related placements based on said defined physical relationships;

arranging said components so as to optimize a predetermined parameter, the parameter being a function of the physical relationship between the components;

eliminating overlaps between said components by moving said groups as a whole wherein said defined relationships are preserved; and

routing the electrical connections between said placed components.

9. The method of claim 8 wherein said step of defining relationships defines matched, and mirrored components.

10. The method of claim 8 wherein said step of arranging optimizes a predetermined connectivity cost parameter based on predetermined features including connection length and wherein said step of determining placement includes the steps of:

building a connectivity matrix representing the cost of connecting each component with the other components to which its connected, said cost being a function of predetermined factors including connection length;

ordering the components according to their connection costs;

trying out various possible placements of said components starting with the components having the highest cost and arranging all other components at a position relative to that component, and their determining the total placement cost;

repeating the arrangement of components starting with the next higher cost component in said ordering until the arrangement with the lowest total cost is determined; and

placing components within each placement group according to the weighted average of the coordinates of the placed objects to which it is connected to minimize the distance between said components within said group.

11. The method of claim 8 wherein said predetermined parameter is total layout area, and wherein said step of determining placement includes the steps of:

ordering said placement group according to decreasing layout area;

positioning the group so that components are in the same relative positions as in the schematic; and

placing components within a group so that components are in the same relative position as in the schematic.

12. The method of claim 8 wherein said means for routing includes

creating abstract representations of each component;

and

determining a routing weight for each connection between said components, wherein said means for routing, routes components having higher weights first.

13. The method of claim 8 wherein said step of routing includes the step of routing said interconnections as if said interconnections had no width, and compacting by moving components apart after routing to create sufficient space for these interconnections.