Method and apparatus for scaling image data

• US 5,305,398 A
• Filed: 10/10/1989
• Issued: 04/19/1994
• Est. Priority Date: 10/10/1989
• Status: Expired due to Term

• Current Assignee: Burroughs Payment Systems Incorporated
• Original Assignee: Unisys Corporation
• Inventors: Jennings, Kevin, Brennan, Audrey A., Klein, Robert
• Primary Examiner(s): Boudreau, Leo H.
• Application Number:
  US07/420,779
• Time in Patent Office: 1,652 Days
• Field of Search: 382/47, 382/56, 382/27, 340/731, 358/433
• US Class Current: 382/298
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 3/403 Edge-driven scaling; Edge-based scaling

Abstract

An application specific integrated circuit (ASIC) provides sufficient information about the size of the image, as well as pixel data, to permit a scaling processor to change the size of the image for further processing.

Claims

1. An image processing device for use with an array of pixel data arranged in rows and columns and corresponding to an image, said device comprising:

first input means for receiving scanned lines of pixel data;

second input means for receiving a signal indicating an end of a scan line from an image sensor that generated the pixel data;

memory means for storing the pixel data in a first matrix;

address generator means for generating an address for each pixel in a scan line;

counter means for identifying each of said end of scan line signals;

output means for providing information regarding each of said scanned lines of pixel data, each of said generated addresses, and said first matrix of pixel data; and

scaling processor means coupled to the output means and operative to create a plurality of sub-matrices from the first matrix of pixel data, each said sub-matrix being centered about a center pixel, and to generate a second matrix of pixel data smaller than the first matrix by combining pixels in each of the plurality of sub-matrices in a predetermined manner to scale down the image, said combination of pixels excluding said center pixel of each sub-matrix.

2. The image processing device of claim 1, wherein the second matrix is generated by taking a median of the pixels in each sub-matrix.

3. The image processing device of claim 2, wherein each sub-matrix comprises three neighboring pixels of a center pixel of interest.

4. The image processing device of claim 3 wherein the first array includes nine pixels arranged in three rows and three columns and wherein each sub-array includes a different one of four corner pixels.

5. The image processing device of claim 4 wherein the second array includes four pixels arranged in two rows and two columns.

6. A scaling down processor for receiving a first plurality of pixels associated with image data, each of said first plurality of pixels having a gray-scale value associated therewith, said scaling processor comprising:

(a) input means for receiving said first plurality of pixels and for arranging said received first plurality of pixels into a first matrix; and

(b) processor means, coupled to said input means, for creating a second matrix by deleting a center pixel of said first matrix and thereafter for creating a second plurality of pixels, each of said second plurality of pixels having a gray-scale value defined by a median of said gray-scale values of said first plurality of pixels contained within said second matrix.

7. An image processing system comprising:

an application specific integrated circuit, said integrated circuit providing first input means for receiving pixel data generated from an image sensor that scans a target and creates a scanned image thereof and provides corresponding image data in a first array of rows and columns, said circuit further including output means providing information about the locations of said pixel data within rows and columns of the scanned image, as well as said pixel data at outputs thereof; and

a scaling processor coupled to the output means of said circuit and operative to create a plurality of sub-arrays from the first array of pixel data, each said sub-array being centered about a center pixel, and to generate a second array of pixel data smaller than the first array by combining pixels in each of the plurality of sub-arrays in a predetermined manner to scale down the image, said combination of pixels excluding said center pixel of each sub-array.

8. The system of claim 7 wherein said circuit further comprises:

second input means for receiving end of scan line signals, each indicating an end of a scan line of said image sensor;

memory means for storing the pixel data;

address generator means for generating an address for each pixel in a scan line;

counter means for identifying each of said end of scan line signals, regarding the placement of each of said pixels within said image data.

9. The image processing system of claim 7, wherein the second array is generating by taking a median of the pixels in each sub-array.

10. The image processing system of claim 9, wherein each sub-array comprises three neighboring pixels of a center pixel of interest.

11. The image processing system of claim 10 wherein the first array includes nine pixels arranged in three rows and three columns and wherein each sub-array includes a different one of four corner pixels.

12. The image processing system of claim 11 wherein the second array includes four pixels arranged in two rows and two columns.

13. A method of scaling down image data corresponding to a captured image, said method comprising:

generating a first array of rows and columns of pixel data centered about a center pixel;

generating a plurality of sub-arrays from the first array, each sub-array excluding the center pixel; and

generating a second array smaller than the first array by combining pixels in each of the plurality of sub-arrays in a predetermined manner to scale down the captured image.

14. The method of claim 13, wherein the second array is generated by taking a median of the pixels in each sub-array.

15. The method of claim 14, wherein each sub-array comprises three pixels adjacent the center pixel.

16. The method of claim 15 wherein the first array includes nine pixels arranged in three rows and three columns and wherein the three pixels in each sub-array are neighboring.

17. The method of claim 16 wherein each sub-array includes a different one of four corner pixels.

18. The method of claim 17 wherein the second array includes four pixels arranged in two rows and two columns.