Method for manufacturing a solar cell from a substrate wafer

• US 5,306,647 A
• Filed: 12/30/1992
• Issued: 04/26/1994
• Est. Priority Date: 01/29/1992
• Status: Expired due to Fees

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Wendt, Hermann, Willer, Josef, Stengl, Reinhard, Lehmann, Volker, Hoenlein, Wolfgang
• Primary Examiner(s): Weisstuch, Aaron
• Application Number:
  US07/998,611
• Time in Patent Office: 482 Days
• Field of Search: 437/2, 437/172, 437/173, 437/203, 437/225, 437/944, 437/974, 437/981, 204/129.3, 204/129.55, 136/255, 136/256, 136/261, 257/466
• US Class Current: 438/71
• CPC Class Codes: H01L 21/3063 Electrolytic etching
• CPC Class Codes: H01L 31/03529 Shape of the potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/047 PV cell arrays including PV cells having multiple vertical junctions or multiple V-groove junctions formed in a semiconductor substrate
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A self-supporting layer of n-doped monocrystalline silicon is stripped from a substrate wafer of n-doped, monocrystalline silicon by electrochemical etching for manufacturing a solar cell. Holes are formed in the substrate wafer by electrochemical etching, particularly in a fluoride-containing, acidic electrolyte wherein the substrate wafer is connected as an anode. When a depth of the holes that essentially corresponds to the thickness of the self-supporting layer is reached, the process parameters of the etching are modified such that the self-supporting layer is stripped as a consequence of the holes growing together. The solar cell is manufactured from the self-supporting layer, and the method can be applied repeatedly on the same substrate wafer for stripping a plurality of self-supporting layers.

Claims

1. A method for manufacturing a solar cell from a substrate wafer, comprising the steps of:

(a) stripping a self-supporting layer of n-doped, monocrystalline silicon by electrochemical etching from a substrate wafer of n-doped, monocrystalline silicon, said stripping comprising the steps of --;

(1) forming holes in a first surface of the substrate wafer by electrochemical etching;

(2) modifying the process parameters of the etching when a depth of the holes which essentially corresponds to thickness of the self-supporting layer has been reached such that the cross section of the holes is enlarged and further such that the self-supporting layer is stripped as a result of the holes growing together;

(b) producing at least one pn-junction in the self-supporting layer; and

(c) providing the self-supporting with contacts such that the pn-junction may be connected as a solar cell.

2. The method of claim 1 further comprising the steps of:

implementing said electrochemical etching in a fluoride-containing, acidic electrolyte with which the first surface is in contact; and

applying an electrical voltage between the substrate wafer and the electrolyte such that the substrate wafer is connected as an anode and such that a predetermined current density that influences the etching erosion flows in the substrate wafer.

3. The method of claim 1 wherein the holes are formed perpendicular to the first surface.

4. The method of claim 1 wherein the substrate wafer is a <

100>

oriented wafer.

5. The method of claim 1 further comprising the step of:

illuminating the substrate wafer through a second surface lying opposite the first surface in order to set the predetermined current density in the substrate wafer.

6. The method of claim 1 further comprising the step of:

generating a surface topology defining the arrangement of the holes at the first surface of the substrate wafer before the formation of the holes.

7. The method of claim 6 wherein the surface topology is composed of regularly arranged depressions on the surface.

8. The method of claim 6 further comprising the steps of:

producing the surface topology by forming a photoresist mask on the first surface of the substrate wafer; and

alkaline etching of the first surface of the substrate wafer.

9. The method of claim 6 further comprising the steps of:

producing the surface topology by electrochemical etching in the electrolyte by producing an illumination pattern on the first surface using a light source having a wavelength less than 100 nm; and

setting the current density in the substrate wafer such that an anodic minority carrier current that effects an etching erosion of the first surface locally flows over the substrate wafer only at illuminated locations of the illumination pattern.

10. The method of claim 1 wherein the electrolyte contains between one percent and fifty percent hydrofluoric acid.

11. The method of claim 10 wherein the electrolyte additionally contains an oxidation agent.

12. The method of claim 1 further comprising the step of:

increasing the current density in the substrate wafer for stripping the self-supporting layer.

13. The method of claim 1 further comprising the step of:

reducing the concentration of the fluoride in the electrolyte for stripping the self-supporting layer.

14. The method of claim 1 further comprising the steps of:

stripping at least one further, self-supporting layer from the substrate wafer by electrochemical etching after the stripping of the self-supporting layer;

producing at least one pn-junction in the further self-supporting layer; and

providing the further self-supporting layer with contacts such that the pn-junction can be connected as a solar cell.

15. The method of claim 1 further comprising the steps of:

coating the self-supporting layer with a layer of boro-phosphorus-silicate glass to produce the pn-junction in the self-supporting layer; and

diffusing boron from the layer of boro-phosphorus-silicate glass to produce a p⁺ -doped region in the self-supporting layer.

16. The method of claim 15 wherein the layer of boro-phosphorus-silicate glass covers the entire surface of the self-supporting layer and the p⁺ -doped region covers the entire surface of the self-supporting layer and the self-supporting layer further comprises a n-doped region in its interior.

17. The method of claim 16 further comprising the steps of:

providing the self-supporting layer with a resist layer after the removal of the layer of boro-phosphorus-silicate glass, said resist layer covering all surfaces of the p⁺ -doped region except the first surface of the self-supporting layer and an upper part of the holes in a region of the first surface; and

selectively etching the part of the p⁺ -doped region not covered by the resist layer such that the n-doped region is uncovered at the first surface.

18. The method of claim 17 further comprising the steps of:

providing the p⁺ -doped region with a passivation layer of thermal silicon dioxide before application of the resist layer.

19. The method of claim 17 wherein the uncovered parts of the n-doped region are provided with an n⁺ -doping in the region of the first surface.

20. The method of claim 17 further comprising the steps of:

applying at least one contact for the connection of the n-doped region onto the first surface after removal of the resist layer; and

applying at least one contact for the connection of the p⁺ -doped region onto a structured surface lying opposite the first surface, said two contacts being applied such that light can enter into the self-supporting layer through the structured surface.