Method of manufacturing P-type compound semiconductor

• US 5,306,662 A
• Filed: 11/02/1992
• Issued: 04/26/1994
• Est. Priority Date: 11/08/1991
• Status: Expired due to Term

• Current Assignee: Nichia Corporation
• Original Assignee: Nichia Chemical Industries Limited
• Inventors: Nakamura, Shuji, Iwasa, Naruhito, Senoh, Masayuki
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Paladugu, Ramamohan Rao
• Application Number:
  US07/970,145
• Time in Patent Office: 540 Days
• Field of Search: 437/107, 437/942, 437/965, 437/126, 437/132, 437/133, 372/46, 257/201, 148/DIG. 3, 148/DIG. 4, 148/DIG. 64
• US Class Current: 438/509
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0087 with a substrate not being a II-VI compound
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: Y10S 148/003 Anneal
• CPC Class Codes: Y10S 148/004 Annealing, incoherent light
• CPC Class Codes: Y10S 148/064 Gp II-VI compounds
• CPC Class Codes: Y10S 438/902 Capping layer
• CPC Class Codes: Y10S 438/909 Controlled atmosphere

Abstract

A method for manufacturing a III-V Group compound or a II-VI Group compound semiconductor element by VPE, comprising the step of annealing a grown compound at 400° C. or higher, or irradiating electron beam the grown compound at 600° C. or higher.

Claims

1. A method of manufacturing a p-type III-V nitride compound semiconductor by a vapor phase epitaxy method, comprising the steps of:

growing a III-V nitride compound semiconductor by using a reaction gas containing a p-type impurity; and

annealing said nitride compound semiconductor at a temperature above 400°

C.

2. A method according to claim 1, wherein said nitride compound semiconductor is represented by general formula Ga_x Al_1-x N (where 0≦

x≦

1).

3. A method according to claim 1, wherein a temperature of said annealing is in the range of 600°

C.-1200°

C.

4. A method according to claim 1, wherein a cap layer is provided on said nitride compound semiconductor before annealing.

5. A method according to claim 4, wherein said cap layer is made of at least one material selected from the group consisting of Ga_x Al_1-x N (where 0≦

x≦

1), In_y Ga_1-y N (where 0≦

y≦

1), Si₃ N₄, and SiO₂.

6. A method according to claim 1, wherein said annealing is carried out in a nitrogen atmosphere pressurized to a point of a decomposition pressure of the III-V nitride compound semiconductor at said annealing temperature, or higher.

7. A method according to claim 1, wherein said reaction has contains at least one of a gallium source of trimethyl gallium, and an aluminum source selected from the group consisting of trimethyl aluminum and diethyl aluminum, an indium source selected from the group consisting of trimethyl indium and diethyl indium, and a nitrogen source selected from the group consisting of ammonia and hydrazin.

8. A method according to claim 1, wherein said p-type impurity is at least one selected the group consisting of Zn, Cd, Be, Mg, Ca, and Ba.