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Binary controlled digital tapped delay line

  • US 5,306,971 A
  • Filed: 07/23/1992
  • Issued: 04/26/1994
  • Est. Priority Date: 07/23/1992
  • Status: Expired due to Fees
First Claim
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1. A binary-controlled digital tapped delay line having a plurality of stages connected in cascade, each stage comprising:

  • differential amplifier means responsive to a pair of input signals for producing a pair of output signals and including a differential transistor pair;

    first loading means comprising a plurality of load devices interconnected to produce a cumulative loading effect and connected to a input of a first transistor of said differential transistor pair for delaying turn-on of said first transistor;

    second loading means comprising a same plurality of load devices also interconnected to produce a cumulative loading effect and connected to an input of a second transistor of said differential transistor pair for delaying turn-on of second transistor, said first loading means and said second loading means each being connected to a first circuit node; and

    delay control means responsive to a binary-controlled signal and connected to said first circuit node for causing turn-on of first and second transistors to be delayed a set amount of time when said binary control signal is asserted.

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