Phase-and-frequency mode/phase mode detector with the same gain in both modes
First Claim
1. A dual-mode detector which has a phase-detection mode of operation and a phase-and-frequency-detection mode of operation;
- wherein the dual-mode detector has a first gain while in the phase-detection mode and a second gain while in the phase-and-frequency-detection mode; and
wherein the first and second gains are the same.
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Accused Products
Abstract
A dual-mode detector which has phase-detection and phase-and-frequency-detection modes of operation, each mode of operation having the same gain. The detector includes a detection and feedback circuit for detecting phase and frequency differences, and for generating first and second feedback signals for controlling the voltage-controlled oscillator in response to the phase and frequency differences. A mode-switching circuit switches the detection and feedback circuit between the phase-detection and the phase-and-frequency-detection modes of operation. A programmable delay circuit delays signals from the mode-switching circuit and provides delayed signals to the detection and feedback circuit. Finally, an optional edge detection circuit converts predetermined data signals to a format recognizable by the detection and feedback circuit.
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Citations
36 Claims
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1. A dual-mode detector which has a phase-detection mode of operation and a phase-and-frequency-detection mode of operation;
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wherein the dual-mode detector has a first gain while in the phase-detection mode and a second gain while in the phase-and-frequency-detection mode; and wherein the first and second gains are the same. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. In a phase-locked loop circuit having a voltage-controlled oscillator, a dual-mode detector comprising:
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first circuit means for detecting phase differences between a data signal and a signal from the voltage-controlled oscillator during a phase-detection mode, for detecting phase and frequency differences between a clock signal and the signal from the voltage-controlled oscillator during a phase-and-frequency-detection mode, and for generating first and second feedback signals for controlling the voltage-controlled oscillator in response to the phase and frequency differences; second circuit means for causing the first circuit means to switch between the phase-detection and the phase-and-frequency-detection modes of operation; and third circuit means for delaying signals from the second circuit means and for providing delayed signals to the first circuit means; wherein the third circuit means is programmable; wherein the dual-mode detector has a first gain while in the phase-detection mode and a second gain while in the phase-and-frequency-detection mode; and wherein the first and second gains are the same.
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17. In a phase-locked loop circuit having a voltage-controlled oscillator, a dual-mode detector comprising:
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first circuit means for detecting phase differences between a data signal and a signal from the voltage-controlled oscillator during a phase-detection mode, for detecting phase and frequency differences between a clock signal and the signal from the voltage-controlled oscillator during a phase-and-frequency-detection mode, and for generating first and second feedback signals for controlling the voltage-controlled oscillator in response to the phase and frequency differences; second circuit means for causing the first circuit means to switch between the phase-detection and the phase-and-frequency-detection modes of operation; and third circuit means for converting predetermined data signals to a format recognizable by the first circuit means; wherein the dual-mode detector has a first gain while in the phase-detection mode and a second gain while in the phase-and-frequency-detection mode; and wherein the first and second gains are the same.
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18. In a phase-locked loop circuit having a voltage-controlled oscillator, a dual-mode detector comprising:
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first circuit means for detecting phase differences between a data signal and a signal from the voltage-controlled oscillator during a phase-detection mode, for detecting phase and frequency differences between a clock signal and the signal from the voltage-controlled oscillator during a phase-and-frequency-detection mode, and for generating first and second feedback signals for controlling the voltage-controlled oscillator in response to the phase and frequency differences; second circuit means for causing the first circuit means to switch between the phase-detection and the phase-and-frequency-detection modes of operation; third circuit means for delaying signals from the second circuit means and for providing delayed signals to the first circuit means; and fourth circuit means for converting predetermined data signals to a format recognizable by the first circuit means; wherein the third circuit means is programmable; wherein the dual-mode detector has a first gain while in the phase-detection mode and a second gain while in the phase-and-frequency-detection mode; and wherein the first and second gains are the same.
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19. A phase-locked loop circuit comprising:
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a dual-mode detector which has phase-detection and phase-and-frequency-detection modes of operation; wherein the dual-mode detector has a first gain while in the phase-detection mode and a second gain while in the phase-and-frequency-detection mode; and wherein the first and second gains are the same. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
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36. A phase-locked loop circuit comprising:
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a voltage-controlled oscillator; a loop filter coupled to the voltage-controlled oscillator; a charge pump coupled to the loop filter; a dual-mode detector, coupled between the voltage-controlled oscillator and the charge pump, and which has phase-detection and phase-and-frequency-detection modes of operation, including first circuit means for detecting phase differences between a data signal and a signal from the voltage-controlled oscillator during the phase-detection mode, for detecting phase and frequency differences between a clock signal and the signal from the voltage-controlled oscillator during the phase-and-frequency-detection mode, and for generating first and second feedback signals for controlling the voltage-controlled oscillator in response to the phase and frequency differences;
second circuit means for causing the first circuit means to switch between the phase-detection and the phase-and-frequency-detection modes of operation;
third circuit means for delaying signals from the second circuit means and for providing delayed signals to the first circuit means; anda frequency divider for dividing the frequency of the output signal from the voltage-controlled oscillator by a predetermined number and for providing an output signal having the quotient frequency to the first circuit means; wherein the dual-mode detector has a first gain while in the phase-detection mode and a second gain while in the phase-and-frequency-detection mode; and wherein the first and second gains are the same.
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Specification