Bi-level halftone processing circuit and image processing apparatus using the same
First Claim
1. A bi-level halftone processing circuit comprising an A/D converter circuit for converting the value of an analog signal of indicating a density of an image to a digital value and an error memory for storing a binary error, wherein said digital value is corrected with the value obtained by multiplying the binary error already computed and stored in said error memory by a predetermined coefficient and wherein the value thus corrected is compared with a threshold value and output in the form of a binary value, said bi-level halftone processing circuit further comprising:
- a correction marginal value generating circuit for generating an upper limit value and a lower limit value which said correction value may take in conformity with said digital value, said correction value being obtainable in conformity with the density value resulting from converting the density value of an object pixel of an original image in accordance with either an exponential function or the approximate function of it,a threshold value generating circuit for dynamically generating said threshold value in accordance with said upper and lower limit values, anda correction value modifying circuit for modifying said correction value to what ranges between said upper and lower limit values,an output circuit for outputting the binary value obtained by comparing said modified value with said threshold value and for outputting, in accordance with this binary value, one of the differences between said modified value and said upper limit value and between said modified value and said lower limit value for storing in said error memory as said binary error.
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Abstract
An upper limit value and a lower limit value are used to modify the correction value computed in a correction value computing circuit in such a way that the correction value ranges between the upper and lower limit values. The threshold value computed from the upper and lower limit values is compared with the modified value to compute a binary value. The upper and lower limit values are selected to become those which the correction value may take. The correction value is obtainable in conformity with the density value resulting from converting the density value of an object pixel of an original image in terms of an exponential function or the approximate function of it.
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Citations
11 Claims
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1. A bi-level halftone processing circuit comprising an A/D converter circuit for converting the value of an analog signal of indicating a density of an image to a digital value and an error memory for storing a binary error, wherein said digital value is corrected with the value obtained by multiplying the binary error already computed and stored in said error memory by a predetermined coefficient and wherein the value thus corrected is compared with a threshold value and output in the form of a binary value, said bi-level halftone processing circuit further comprising:
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a correction marginal value generating circuit for generating an upper limit value and a lower limit value which said correction value may take in conformity with said digital value, said correction value being obtainable in conformity with the density value resulting from converting the density value of an object pixel of an original image in accordance with either an exponential function or the approximate function of it, a threshold value generating circuit for dynamically generating said threshold value in accordance with said upper and lower limit values, and a correction value modifying circuit for modifying said correction value to what ranges between said upper and lower limit values, an output circuit for outputting the binary value obtained by comparing said modified value with said threshold value and for outputting, in accordance with this binary value, one of the differences between said modified value and said upper limit value and between said modified value and said lower limit value for storing in said error memory as said binary error. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A bi-level halftone processing circuit comprising an A/D converter circuit for converting the value of an analog signal of indicating a density of an image to a digital value, an error memory for storing a binary error, and a correction value computing circuit for correcting said digital value with the value obtained by multiplying the binary error already computed and stored in said error memory by a predetermined coefficient and wherein the value thus corrected by said correction value computing circuit is compared with a threshold value and output in the form of a binary value, said bi-level halftone processing circuit further comprising:
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a correction marginal value generating circuit which generates an upper limit value and a lower limit value which said correction value may take in conformity with said digital value, said correction value being obtainable in conformity with the density value substantially resulting from converting the density value of an object pixel of an original image in accordance with either an exponential function or the approximate function of it, a correction value modifying circuit which modifies the correction value computed in said correction value computing circuit by using said upper and lower limit values to what ranges therebetween, and a comparator which computes said threshold value from said upper and lower limit values, and compares said threshold value with the value modified by said modifying circuit to output a binary value, an output circuit which outputs one of the differences between said upper limit value and said modified value and between said lower limit value and said modified value for storing in said binary error memory in conformity with said binary value.
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10. A bi-level halftone processing circuit comprising:
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an A/D converter circuit for converting the value of an analog signal of indicating a density of an image to a digital value, an error memory for storing a binary error, a correction value computing circuit which computes a correction value with said digital value by correcting said digital value with the value obtained by multiplying the binary error already computed and stored in said error memory by a predetermined coefficient, a correction marginal value generating circuit which generates an upper limit value and a lower limit value which said correction value may take in conformity with said digital value, said correction value being obtainable in conformity with the density value substantially resulting from converting the density value of an object pixel of an original image in terms of either an exponential function or an approximate function a threshold value generating circuit which dynamically generates said threshold value in accordance with said upper and lower limit values, a correction value modifying circuit which modifies said correction value to what ranges between said upper and lower limit values, a comparator which outputs a binary value obtainable by comparing said modified value with said threshold value, and an error computing circuit which outputs, in conformity with said binary value, one of the differences between said modified value and said upper limit value and between said modified value and said lower limit value to said error memory as said binary error.
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11. An image processing apparatus comprising an A/D converter circuit for converting the value of an analog signal of indicating a density of an image to a digital value, an error memory for storing a binary error, and a correction value computing circuit for correcting said digital value with the value obtained by multiplying the binary error already computed and stored in said error memory by a predetermined coefficient and wherein the value thus corrected by said correction value computing circuit is compared with a threshold value and output in the form of a binary value, said image processing apparatus further comprising:
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a correction marginal value generating circuit which generates an upper limit value and a lower limit value which said correction value may take in conformity with said digital value, said correction value being obtainable in conformity with the density value substantially resulting from converting the density value of an object pixel of an original image in terms of either an exponential function or the approximate function of it, correction value modifying circuit which modifies the correction value computed in said correction value computing circuit by using said upper and lower limit values to what ranges therebetween, and a comparator for computing said threshold value from said upper and lower limit values, and comparing said threshold value with the value modified by said modifying circuit to output a binary value, an output circuit which outputs one of the differences between said upper limit value and said modified value and between said lower limit value and said modified value for storing in said binary error memory in conformity with said binary value, whereby a bi-level halftone signal is generated.
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Specification