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Bi-level halftone processing circuit and image processing apparatus using the same

  • US 5,307,425 A
  • Filed: 09/01/1992
  • Issued: 04/26/1994
  • Est. Priority Date: 09/02/1991
  • Status: Expired due to Term
First Claim
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1. A bi-level halftone processing circuit comprising an A/D converter circuit for converting the value of an analog signal of indicating a density of an image to a digital value and an error memory for storing a binary error, wherein said digital value is corrected with the value obtained by multiplying the binary error already computed and stored in said error memory by a predetermined coefficient and wherein the value thus corrected is compared with a threshold value and output in the form of a binary value, said bi-level halftone processing circuit further comprising:

  • a correction marginal value generating circuit for generating an upper limit value and a lower limit value which said correction value may take in conformity with said digital value, said correction value being obtainable in conformity with the density value resulting from converting the density value of an object pixel of an original image in accordance with either an exponential function or the approximate function of it,a threshold value generating circuit for dynamically generating said threshold value in accordance with said upper and lower limit values, anda correction value modifying circuit for modifying said correction value to what ranges between said upper and lower limit values,an output circuit for outputting the binary value obtained by comparing said modified value with said threshold value and for outputting, in accordance with this binary value, one of the differences between said modified value and said upper limit value and between said modified value and said lower limit value for storing in said error memory as said binary error.

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