Multiprocessor system statically dividing processors into groups allowing processor of selected group to send task requests only to processors of selected group

• US 5,307,495 A
• Filed: 07/29/1991
• Issued: 04/26/1994
• Est. Priority Date: 10/23/1987
• Status: Expired due to Term

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Ogawa, Kiyoshi, Seino, Satoshi, Takeda, Katsumi, Umeno, Hidenori
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): Harrity, Paul
• Application Number:
  US07/735,674
• Time in Patent Office: 1,002 Days
• Field of Search: 395/200, 395/375, 395/800, 395/325, 395/650, 340/825.06, 364/131, 364/133
• US Class Current: 718/106
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

In a computer system capable of being configured in a multiprocessor system, a plurality of virtual machines are grouped by object of use to define a plurality of processor groups. Each processor has an identifier for a processor group to which it belongs. When an instruction which requires synchronous execution among the processors is executed, the processor identifies the processor group to which it belongs and requests the synchronous execution of the instruction to only the processors in the group. In another aspect, each processor which has a request for execution refers to its own identifier to determine if the request is from a processor of the same group in order to determine whether it should execute the instruction or not. When the processor completes the execution of the instruction, it sends an end signal to the requesting processor so that another instruction from other processors in the same group can be executed.

Claims

1. In a multiprocessor system having a plurality of processors which are tightly coupled to each other and a main storage shared by the processors, a method for executing an instruction requiring synchronization among said processors, said method comprising the steps of:

statically providing to every one of the plurality of processors, regardless of tasks to be processed, group identification information for grouping the plurality of processors into a plurality of groups in accordance with a desired configuration condition, each of the groups of processors being provided with the same group identification information comprising at least one, wherein at least one of the groups comprises at least two processors processor;

storing parameter information related to an instruction originally requiring synchronization among the plurality of processors in the main storage;

sending request information for synchronous execution of the instruction from a processor of a particular group of said plurality of processors, serving as an instruction issuing processor, to receiving processors of said particular group of the plurality of processors when said particular group processes one of the tasks, said request information including group identification information of said particular group;

comparing, in each of said receiving processors, the group identification information provided to each of said receiving processors to the group identification information included in the sent request information;

reading out the parameter information from the main storage to execute the instruction in accordance with the read out parameter information in each processor of said particular group of said receiving processors, in which coincidence was found between group identification information provided to each of said receiving processors and group identification included in the sent request information according to said comparing step;

invalidating the sent request information in each of said receiving processors except for processors included in said particular group of processors for which the instruction was intended;

generating end information in each processor of said particular group of processors when the processor completes processing of the instruction; and

waiting, in said instruction issuing processor, for the end information from each processor of said particular group having processed the instruction, except for said instruction issuing processor, to detect termination of the synchronous execution of the instruction.

2. A method for synchronously executing an instruction according to claim 1, wherein said desired configuration condition includes the group identification information, configuration defining information for variably assigning one or more virtual machines to one or more groups of processors and an operating system for operating on each of said virtual machines.

3. A method for synchronously executing an instruction according to claim 2, wherein when the instruction is issued from said operating system operating on a first virtual machine from among said virtual machines, only virtual machines in a group to which said first virtual machine belongs can execute processes necessary for complete execution of the instruction in response to the request information.

4. A method for synchronously executing an instruction according to claim 3, wherein said instruction requiring the synchronization includes at least a purge address translation look-aside buffer extended instruction, an invalidate page table entry instruction, a set storage key extended instruction, and a reset reference bit extended instruction.

5. A method for synchronously executing an instruction according to claim 1, wherein the parameter information includes at least group identification information, and, in response to the request information, each processor in said particular group reads out the parameter information from the main storage based on the group identification information.

6. A method for synchronously executing an instruction in a computer system comprising a plurality of processors from a tightly coupled multiprocessor system sharing a main storage, said method comprising the steps of:

statically providing, to each of a plurality of processors constituting said multiprocessor system, group identification information for grouping said plurality of processors into a plurality of groups of said processors in accordance with a desired configuration condition, regardless of tasks to be processed by any said group of said processors, said group identification information identifying which of said groups of processors each said processor belongs to, each of said groups of processors being independent from each other;

referring to said group identification information of an instruction issuing processor from among said plurality of groups of said plurality of processors to ascertain whether said instruction issuing processor belongs to a particular group of processors when an instruction requiring synchronization among said particular group of processors is to be executed;

sending a request signal requesting synchronous execution of the instruction from said instruction issuing processor to receiving processors belonging to the same said particular group of processors as said instruction issuing processor;

storing parameter information relating to the instruction into said main storage;

fetching the parameter information stored in said main storage and supplying the fetched parameter information to a first receiving processor from among said receiving processors in response to said request signal;

executing the instruction in the first receiving processor based on the fetched parameter information;

sending an end signal from the first receiving processor to said instruction issuing processor when the first receiving processor completes processing of the instruction; and

restarting parallel processing of the task in response to all of said end signals from those of said processors ascertained to belong to the same particular group of processors as the instruction issuing processor.

7. A method for synchronously executing an instruction according to claim 6, wherein said desired configuration condition includes the group identification information, configuration defining information for variably and respectively assigning one or more virtual machines to processors in said multiprocessor system and operating systems, each of said operating systems operating a corresponding virtual machine.

8. A method for synchronously executing an instruction according to claim 7, wherein when the instruction requiring synchronization is issued from an operating system operating a first virtual machine, only virtual machines in said particular group to which said first virtual machine belongs can execute processes necessary for complete execution of the instruction in response to the request information.

9. A method for synchronously executing an instruction according to claim 8, wherein said instruction requiring synchronization includes at least a purge address translation look-aside buffer extended instruction, an invalidate page table entry instruction, a set storage key extended instruction and a reset reference bit extended instruction.

10. A computer system, which is configured in a tightly coupled multiprocessor system having a plurality of processors, each processor of said plurality of processors comprising:

group identification means for holding identification information representing a group of processors to which each of said processors belongs, each processor of said plurality of processors belonging to a particular group of processors, to define one of said particular groups of processors included in the computer system, said identification information being predeterminedly and statically provided;

identification signaling means, coupled to said group identification means, for signaling said identification information of one processor, when said one processor serves as an instruction issuing processor and is to execute an instruction originally requiring synchronization among processors of the same said particular group of processors as said instruction issuing processor for processing of a task in parallel by said particular group of processors; and

means responsive to said signaling means signaling identification information for a second instruction issuing processor separate from said one processor, for determining if said one processor belongs to the same processor group as said second instruction issuing processor based on the identification information sent from said second instruction issuing processor and the identification information of the group to which said one processor belongs, executing the instruction when said one processor is determined to belong to the same particular group of processors as said second instruction issuing processor, and invalidating the synchronization when said one processor is determined to not belong to the same group as said second instruction issuing processor.

11. A computer system according to claim 10, further comprising:

service processor means for setting the identification information in each processor of said plurality of processors.

12. A computer system according to claim 10, wherein said one processor further comprises:

means responsive to said signaling means of said second instruction issuing processor, for returning a response to said second instruction issuing processor; and

identifying means for detecting the responses from all processors in said particular group to identify all processors in said particular group of processors.

13. A computer system according to claim 12, wherein said one processor further comprises:

means for storing a total for the number of processors in said particular group of processors to which said one processor belongs, and said identifying means identifies said processors in said particular group of processors in accordance with the number of said detected responses.

14. A computer system according to claim 10, wherein said group identification means includes means for storing address information of all of said processors in said particular group of processors to which said one processor belongs in a storage area and said identification signaling means includes means for referring to said storage area and signaling the identification information to all of said processors in said particular group of processors to which said one processor belongs, in accordance with the address information.

15. A computer system according to claim 10, further comprising:

a main storage having a control program for controlling said plurality of processors and a program for controlling signaling among said plurality of processors.

16. A computer system configured as a tightly coupled multiprocessor system by forming a plurality of groups having a plurality of processors in accordance with a desired configuration condition, each processor of said plurality of processors comprising:

group identification means for holding identification information for identifying processors belonging to a same particular processor group as one processor of said plurality of processors;

means, responsive to execution of an instruction originally requiring synchronization among all of said plurality of processors in said computer system, for referring to said identification information of said group identification means and for ascertaining those processors of said plurality of processors belonging to said same particular group of processors as said one processor;

signaling means responsive to said referring and ascertaining means for requesting synchronous execution of said instruction by said one processor to said ascertained processors of said same particular group of processors;

and executing means for executing the execution request in said ascertained processors of said same particular group of processors.

17. A computer system according to claim 16, wherein said group identification means is a bit map register for storing said identification information.

18. A computer system according to claim 17, wherein said one processor further comprises:

means for storing a total of processors in said particular group of processors to which said one processor belongs, said identifying means identifying processors in said particular group of processors in accordance with said number of detected responses.

19. A computer system according to claim 16, wherein said one processor further comprises:

means responsive to said signaling means of another processor, for returning a response to said another processor; and

identifying means for detecting the responses from all the processors in said particular group of processors to which said one processor belongs, to identify all the processors in said particular group of processors.

20. A computer system according to claim 16, wherein said group identification means includes means for storing, as said identification information, address information of said processors in said particular group of processors to which said one processor belongs in an area of storage, and said signaling means includes means for referring to said storage area and requesting the synchronous execution of said instruction.

21. In a multiprocessor system including a plurality of processors and a main memory, a method for decreasing overhead of the system, said method comprising the steps of:

statically forming groups of processors from among said plurality of processors in advance in accordance with a system configuration designated by a user to assign one or more operating systems to a particular one of said groups of processors, each of said operating systems being able to operate on corresponding ones of said processors within said particular group of processors,

said forming step comprises the step of assigning a group identifier to each of the group processors;

generating, from one processor of said particular group of processors, a processing request which is associated with a particular one of said operating systems,

said generating step comprises the step of generating the processing request such that the processing request includes the group identifier;

sending said processing request from said one processor of said particular group of processors to said processors of said particular group of processors; and

responding to said processing request in each of said processors of said particular group of processors, except for said generating processor, and neglecting said processing request in each of said processors not included in said particular group of processors,

said responding step comprises the step of responding to the processing request in accordance with coincidence between the assigned group identifier and the group identifier included in the processing request.

22. A method according to claim 21, wherein said generating step comprises the step of generating the processing request to all of the plurality of processors.

23. A method according to claim 21, wherein each of said group of processors has information representing the processors in a corresponding group of processors, and said generating step comprises the step of generating the processing request to a corresponding group of processors for said generating processor.

24. A method according to claim 21, further comprising the step of waiting for response information from each of the group of processors in the generating processor to detect completion of processing concerning the processing request.

25. A method according to claim 21, further comprising the step of waiting for an elapsing of a period of predetermined time in the generating processor to detect completion of processing concerning the processing request.

26. In a computer system including a plurality of processors and a main memory, a method for decreasing overhead of said computer system, said method comprising the steps of:

statically forming groups of processors from among said plurality of processors in advance in accordance with a system configuration designated by a user to assign one or more operating systems to a particular one of said groups of processors, each of said operating systems being able to operate on each of said processors within the same said particular group of processors, one or more virtual machines being assigned to said particular group of processors to form groups of said virtual machines, one operating system operating on each group of virtual machines,

said forming step comprises the step of assigning a group identifier to each of the groups of processors;

generating from one of said operating systems, which is associated with one of said groups of virtual machines, a processing request which is associated with one said processor of said particular group of processors,

said generating step comprises the step of generating the processing request such that the processing request includes the group identifier;

sending said processing request from said one processor of said particular group of processors to said processors of said particular group of processors; and

responding to said generated processing request in each of said processors of said particular group of processors, except for said one processor corresponding to a generating virtual machine associated with said operating system, and neglecting the processing request in each of the plurality of processors not included in said particular group of processors,

said responding step comprises the step of responding to the processing request in accordance with coincidence between the assigned group identifier and the group identifier included in the processing request.

27. A method according to claim 26, wherein said generating step comprises the step of generating the processing request to each of said processors in each of said groups of processors which receives said processing request.

28. A method according to claim 26, wherein each processor of each of said particular groups of processors has information representing the processors in said particular group of processors and said generating step comprises the step of generating said processing request to said processor of the group which receives said processing request except for a processor corresponding to said generating virtual machine.

29. A method according to claim 26, further comprising the step of waiting for response information from each processors of said particular group of processors, in the generating processor, to detect completion of processing concerning said processing request.

30. A method according to claim 26, further comprising the step of waiting for an elapsing of a period of predetermined time in the generating processor to detect completion of processing concerning the processing request.

31. A method for executing instructions in a multiprocessor system in which a main storage is shared by a plurality of processors, said method comprising the steps of:

statically dividing said plurality of processors into a plurality of groups of processors in accordance with a desired configuration condition prior to execution of said instructions;

generating parameter information to one of said groups of processors when a particular one of said plurality of processors executes an instruction which requires synchronization processing among the other of said processors belonging to the same group of processors as said particular processor, said parameter information generation being based on a group identifier assigned to said particular processor;

sending said parameter information and a signal requesting said synchronization from said particular processor to respective ones of said other processors of said same group of processors;

determining, in each of said respective other processors, whether or not said respective processor belongs to said same group of processors to which said particular processor sending said signal belongs, said determination based on said parameter information and said group identifier assigned to each of said respective other processors; and

executing said synchronization processing in each of said respective other processors that is determined to belong to said group of processors to which said processor sending said signal belongs.

32. A method for executing instructions in a multiprocessor system according to claim 31, wherein said parameter information and said signal requesting synchronization processing are sent via said main storage.

33. A method for executing instructions in a multiprocessor system according to claim 31, further comprising the step of invalidating said signal requesting synchronization processing, in a respective one of said other processors, when it is determined that said respective one of said other processors does not belong to said group of processors to which said processor sending said signal requesting synchronization processing belongs.

34. A method for executing instructions in a multiprocessor system according to claim 31, wherein said multiprocessor system comprises an operating system which occupies at least one processor constituting a plurality of virtual processors corresponding to said plurality of processors.

35. A method for executing instructions in a multiprocessor system in which a main storage is shared by a plurality of processors, said method comprising the steps of:

statically dividing said plurality of processors into a plurality of groups of processors in accordance with a desired system configuration;

assigning group information to each of said groups of processors relating to respective ones of said plurality of processors which belong to respective ones of said groups of processors;

identifying processors which belong to respective ones of said groups of processors, based on said group information, when a particular one of said respective processors executes an instruction which requires synchronization processing among other of said respective processors;

sending a signal requesting said synchronization processing to respective ones of said processors belonging to the same group of processors to which said particular processor belongs; and

executing said synchronization processing in response to said requesting signal in each of said processors belonging to the same group of processors which receive said requesting signal.

36. A method for executing instructions in a multiprocessor system according to claim 35, wherein said multiprocessor system comprises an operating system which occupies at least a processor constituting a plurality of virtual processors corresponding to said plurality of processors.x