Anisotropically etched ink fill slots in silicon

• US 5,308,442 A
• Filed: 01/25/1993
• Issued: 05/03/1994
• Est. Priority Date: 01/25/1993
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Gallicano, Joan P., Taub, Howard H.
• Primary Examiner(s): POWELL, WILLIAM A
• Application Number:
  US08/009,181
• Time in Patent Office: 463 Days
• Field of Search: 156/643, 156/644, 156/647, 156/653, 156/656, 156/657, 156/659.1, 156/661.1, 156/662, 346/140 R
• US Class Current: 216/27
• CPC Class Codes: B41J 2/162 Manufacturing of the nozzle plates
• CPC Class Codes: B41J 2/1628 dry etching
• CPC Class Codes: B41J 2/1629 wet etching
• CPC Class Codes: B41J 2/1631 photolithography
• CPC Class Codes: B41J 2/1632 machining
• CPC Class Codes: B41J 2002/14387 Front shooter

Abstract

An ink fill slot 18 can be precisely manufactured in a substrate 12 utilizing photolithographic techniques with chemical etching. N-type <100> silicon wafers are double-side coated with a dielectric layer 26 comprising a silicon dioxide layer and/or a silicon nitride layer. A photoresist step, mask alignment, and plasma etch treatment precede an anisotropic etch process, which employs an anisotropic etchant for silicon such as KOH or ethylene diamine para-catechol. The anisotropic etch is done from the backside 12b of the wafer to the frontside 12a, and terminates on the dielectric layer on the frontside. The dielectric layer on the frontside creates a flat surface for further photoresist processing of thin film resistors 16.

Claims

1. A method for fabricating ink fill slots in thermal ink-jet printheads, comprising:

(a) providing a silicon substrate having a <

100>

or <

110>

crystallographic orientation and two opposed, substantially parallel major surfaces, defining a primary surface and a secondary surface;

(b) forming a passivating dielectric layer on both said major surfaces;

(c) exposing a portion of said secondary surface of said silicon substrate underlying said dielectric layer;

(d) anisotropically etching said exposed portion through said substrate to expose a portion of said dielectric layer on said primary surface to form said ink fill slot;

(e) forming and defining thin film resistor elements and conductive traces on said dielectric layer formed on said primary surface;

(f) removing said exposed portion of said dielectric layer on said primary surface overlying said ink fill slot; and

(g) forming a layer on the major surface of said dielectric material and defining openings therein to expose said resistor elements to define a drop ejection chamber and to provide an ink feed channel from said resistor elements to a terminus region, said terminus region fluidically communicating with said ink fill slot for introducing ink from a reservoir to said drop ejection chamber.

2. The method of claim 1 further comprising providing a nozzle plate with nozzle openings, each nozzle opening operatively associated with a resistor element to define a firing element.

3. The method of claim 2 wherein said terminus region is provided with a pair of opposed projections formed in walls in said layer defining said ink feed channel and separated by a width to cause a constriction in said ink feed channel.

4. The method of claim 3 wherein each firing element is provided with lead-in lobes disposed between said projections and separating one ink feed channel from a neighboring ink feed channel.

5. The method of claim 4 wherein said ink fill slot extends to said lead-in lobes.

6. The method of claim 5 wherein said extended portion of said ink fill slot terminates at a substantially constant distance from the entrance to each said ink feed channel.

7. The method of claim 1 wherein said exposed portion of said dielectric layer on said primary surface overlying said ink fill slot is removed by chemical etching.

8. The method of claim 7 wherein a photoresist layer is deposited on said thin film resistor elements and said conductive traces and said exposed portion of said dielectric layer is removed by chemical etching through said openings in said silicon substrate.

9. The method of claim 7 wherein a photoresist layer is deposited on said thin film resistor resistors and said conductive traces, said photoresist layer is patterned and developed to form openings which uncover said exposed portion of said dielectric layer, and said exposed portion is removed by chemical etching through said openings in said photoresist layer.

10. The method of claim 1 wherein after forming and defining said thin film resistor elements and conductive traces, a passivating dielectric layer is formed thereover.