High power ceramic microelectronic package

• US 5,311,399 A
• Filed: 06/24/1992
• Issued: 05/10/1994
• Est. Priority Date: 06/24/1992
• Status: Expired due to Fees

• Current Assignee: CMC Laboratories, Inc.
• Original Assignee: Carborundum Co (Compagnie De Saint-Gobain S.A.)
• Inventors: Zell, Felician A., Miller, Gerald R.
• Primary Examiner(s): Thompson, Gregory D.
• Application Number:
  US07/903,422
• Time in Patent Office: 685 Days
• Field of Search: 174/73.1, 228/180.2, 257/666, 257/669, 257/673, 257/674, 257/779, 257/781, 257/784, 257/735-736, 257/772, 361/386-389, 361/392, 361/394, 361/395, 361/403, 361/406, 361/421
• US Class Current: 361/707
• CPC Class Codes: H01L 23/15 Ceramic or glass substrates H01L23/142, H01L23/145, H01L23/147 take precedence
• CPC Class Codes: H01L 23/36 Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/49861 Lead-frames fixed on or encapsulated in insulating substrates H01L23/4985, H01L23/49805 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A microelectronic package comprising a ceramic substrate (22) having a first surface bonded to a metal heat sink (25) and a second surface (30) opposite said first surface and having at least one metallized island (32) bonded to a lead frame (26), wherein the island has a uniform pullback (35) of metallization from the edge (36) of the substrate.

Claims

1. A microelectronic package comprising a ceramic substrate having an edge, a first surface bonded to a metal heat sink and a second surface opposite said first surface and having at least one metallized island bonded to a lead frame, wherein said island has a controlled length uniform pullback of metallization from the edge of said substrate, wherein the metallization pullback length is within the range sufficient to reduce residual tensile stress in said substrate compared to a substrate having no controlled length metallization pullback at the substrate surface bonded to a lead frame.

2. The microelectronic package of claim 1 further having a controlled length uniform pullback of metallization from substantially the entire outer perimeter of the second surface.

3. The microelectronic package of claim 1 wherein said substrate comprises aluminum nitride.

4. The microelectronic package of claim 1 wherein the metallization pullback is within the range of about 5 mils to about 10 mils.

5. The microelectronic package of claim 1 wherein at least one of said metal sink and said lead frame is bonded to said substrate by a braze material.

6. The microelectronic package of claim 5 wherein said braze material comprises at least one element selected from the group consisting of silver, nickel, copper, gold, mixtures thereof, and alloys thereof.

7. The microelectronic package of claim 6 wherein said braze material is substantially free from titanium, zirconium, and hafnium.

8. The microelectronic package of claim 1 further having a die attach area on said second surface electrically isolated from said island and a semiconductor device bonded to the die attach area.

9. The microelectronic package of claim 8 wherein the semiconductor device is an RF oscillator or amplifier.

10. The microelectronics package of claim 1 having at least one additional separate island bonded to a corresponding separate lead frame, wherein said at least one additional separate island has a controlled length uniform pullback of metallization from the edge of said substrate, wherein the metallization pullback length is within the range sufficient to reduce residual tensile stress in said substrate compared to a substrate having no controlled length metallization pullback at the substrate surface bonded to a lead frame.

11. The microelectronics package of claim 10 wherein said substrate comprises aluminum nitride.

12. The microelectronics package of claim 2 wherein said substrate comprises aluminum nitride.

13. A ceramic substrate having an edge and at least one metallized surface, said surface containing a metallized die attach area and at least one metallized island electrically isolated from the die attach area, said island having a controlled length uniform pullback of metallization from the edge of the substrate, wherein the metallization pullback length is within the range sufficient to reduce residual tensile stress in said substrate compared to a substrate having no controlled length metallization pullback at the substrate surface bonded to a lead frame.

14. The ceramic substrate of claim 13 having at least two metallized islands electrically isolated from the die attach area, said islands having a controlled length uniform pullback metallization from the edge of the substrate.

15. The ceramic substrate of claim 13 wherein the metallization pullback is within the range of about 5 mils to about 10 mils.

16. The ceramic substrate of claim 13 further having a controlled length uniform pullback of metallization from substantially the entire outer perimeter of said surface.

17. The ceramic substrate of claim 16 wherein the metallization pullback is within the range of about 5 mils to about 10 mils.

18. The ceramic substrate of claim 13 wherein the ceramic substrate comprises aluminum nitride.