Driver for bus circuit of motor vehicle multiplex communications system
First Claim
1. A circuit for driving a two wire bus for a multiplex communication system in a motor vehicle, said bus having a first wire which is terminated to vehicle ground potential through at least one resistor and a second wire which is terminated to bus signal potential through at least one resistor, said circuit comprising:
- a first transistor having a control terminal, a current input terminal and a current output terminal;
current limiting means coupled to said first transistor for limiting maximum current flow in said first transistor from said current input terminal to said current output terminal;
first switch time control means coupled to said first transistor for slowing turn-on and turn-off of said first transistor;
first transistor control means coupled to said control terminal of said first transistor for providing turn-on and turn-off signals to said control terminal of said first transistor;
first base drive control means coupled to said control terminal of said first transistor for preventing turn-on of said first transistor in the absence of turn-on signals from said first transistor control means;
first diode means for coupling said current output terminal of said first transistor to said first wire of said bus;
a second transistor having a control terminal, a current input terminal and a current output terminal;
dual control current limiting means coupled to said second transistor for limiting maximum current flow in said second transistor from said current input terminal to said current output terminal;
second switch time control means coupled to said second transistor for slowing turn-on and turn-off of said second transistor;
second transistor control means coupled to said control terminal of said second transistor for providing turn-on and turn-off signals to said control terminal of said second transistor;
second base drive control means coupled to said control terminal of said second transistor for preventing turn-on of said second transistor in the absence of turn-on signals from said second transistor control means;
second diode means for coupling said current input terminal of said second transistor to said second wire of said bus;
high voltage transient suppression means coupled to said first and second wires of said bus for protecting said circuit from high voltage transients; and
radio frequency suppression means coupled to said first and second wires of said bus for bypassing high frequency noise to ground potential.
12 Assignments
0 Petitions
Accused Products
Abstract
A bus driver circuit for a multiplex communications system is configured from a limited number of components to withstand short circuiting of a connected bus circuit to voltage levels from ground potential to double conventional voltage levels encountered within a motor vehicle, i.e. twenty four (24) volts. The bus driver circuit does not interfere with bus operation if local power or ground is lost by one or more system node including the circuit, and can operate at relatively high frequencies, for example of approximately 83.3 to 166.7 kilobits per second (KBPS). Each line of a two-line bus is driven by a transistor whose current flow is limited by emitter degeneration and, in the case of the transistor which sinks current from the bus, a separate current control transistor which monitors current flow through its associated bus driver transistor and reduces its base drive at high temperatures to limit current flow therethrough and compensate the circuit for temperature variations. The turn-on and turn-off edges of bus driver signals are rounded by capacitors connected across the collector-base junctions of the bus driver transistors.
31 Citations
20 Claims
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1. A circuit for driving a two wire bus for a multiplex communication system in a motor vehicle, said bus having a first wire which is terminated to vehicle ground potential through at least one resistor and a second wire which is terminated to bus signal potential through at least one resistor, said circuit comprising:
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a first transistor having a control terminal, a current input terminal and a current output terminal; current limiting means coupled to said first transistor for limiting maximum current flow in said first transistor from said current input terminal to said current output terminal; first switch time control means coupled to said first transistor for slowing turn-on and turn-off of said first transistor; first transistor control means coupled to said control terminal of said first transistor for providing turn-on and turn-off signals to said control terminal of said first transistor; first base drive control means coupled to said control terminal of said first transistor for preventing turn-on of said first transistor in the absence of turn-on signals from said first transistor control means; first diode means for coupling said current output terminal of said first transistor to said first wire of said bus; a second transistor having a control terminal, a current input terminal and a current output terminal; dual control current limiting means coupled to said second transistor for limiting maximum current flow in said second transistor from said current input terminal to said current output terminal; second switch time control means coupled to said second transistor for slowing turn-on and turn-off of said second transistor; second transistor control means coupled to said control terminal of said second transistor for providing turn-on and turn-off signals to said control terminal of said second transistor; second base drive control means coupled to said control terminal of said second transistor for preventing turn-on of said second transistor in the absence of turn-on signals from said second transistor control means; second diode means for coupling said current input terminal of said second transistor to said second wire of said bus; high voltage transient suppression means coupled to said first and second wires of said bus for protecting said circuit from high voltage transients; and radio frequency suppression means coupled to said first and second wires of said bus for bypassing high frequency noise to ground potential. - View Dependent Claims (2, 3, 4, 5, 6)
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- 7. A circuit for driving a two wire bus for a multiplex communication system in a motor vehicle as claimed in claim wherein said second switch time control means coupled to said second transistor comprises a capacitor connected between said base and said collector of said second transistor.
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12. A circuit for driving one wire of a two wire bus for a multiplex communication system in a motor vehicle, said one wire of said bus being terminated to vehicle ground potential through at least one resistor, said circuit comprising:
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a transistor having a control terminal, a current input terminal and a current output terminal; current limiting means coupled to said transistor for limiting maximum current flow in said transistor from said current input terminal to said current output terminal; switch time control means coupled to said transistor for slowing turn-on and turn-off of said transistor; transistor control means coupled to said control terminal of said transistor for providing turn-on and turn-off signals to said control terminal of said transistor; base drive control means coupled to said control terminal of said transistor for preventing turn-on of said transistor in the absence of turn-on signals from said transistor control means; diode means for coupling said current output terminal of said transistor to said one wire of said bus; high voltage transient suppression means coupled to said one wire of said bus for protecting said circuit from high voltage transients; and radio frequency suppression means coupled to said one wire of said bus for bypassing high frequency noise to ground potential. - View Dependent Claims (13, 14, 15, 16)
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17. A circuit for driving one wire of a two wire bus for a multiplex communication system in a motor vehicle, said one wire of said bus being terminated to bus signal potential through at least one resistor, said circuit comprising:
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a transistor having a control terminal, a current input terminal and a current output terminal; dual control current limiting means coupled to said transistor for limiting maximum current flow in said transistor from said current input terminal to said current output terminal; switch time control means coupled to said transistor for slowing turn-on and turn-off of said transistor; transistor control means coupled to said control terminal of said transistor for providing turn-on and turn-off signals to said control terminal of said transistor; base drive control means coupled to said control terminal of said transistor for preventing turn-on of said transistor in the absence of turn-on signals from said transistor control means; diode means for coupling said current input terminal of said transistor to said one wire of said bus; high voltage transient suppression means coupled to said one wire of said bus for protecting said circuit from high voltage transients; and radio frequency suppression means coupled to said one wire of said bus for bypassing high frequency noise to ground potential. - View Dependent Claims (18, 19, 20)
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Specification