Modem for fading digital channels affected by multipath

• US 5,311,545 A
• Filed: 06/17/1991
• Issued: 05/10/1994
• Est. Priority Date: 06/17/1991
• Status: Expired due to Term

• Current Assignee: Hughes Electronics Corporation (AT&T, Inc.)
• Original Assignee: Hughes Aircraft Company (Rtx Corporation)
• Inventors: Critchlow, David N.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): VO, DON NGUYEN
• Application Number:
  US07/716,171
• Time in Patent Office: 1,058 Days
• Field of Search: 375/39, 375/83, 375/86, 375/102, 375/103, 375/97, 375/80, 375/94, 375/52, 375/53, 375/57, 375/58, 375/112, 375/18, 375/101, 375/14, 375/15, 375/85, 329/304
• US Class Current: 375/232
• CPC Class Codes: H04L 2027/003 at baseband only
• CPC Class Codes: H04L 2027/0042 the equaliser providing the offset correction per se
• CPC Class Codes: H04L 2027/0055 single phase
• CPC Class Codes: H04L 2027/0057 quadrature phase
• CPC Class Codes: H04L 27/2332 using a non-coherent carrier

Abstract

A receiver designed for use in a mobile environment, which includes an adaptive equalizer driven by phase estimation and rotation circuitry, and which is operable in multipath fading channels. The present invention uses an AFC loop and a phase rotation circuit in front of the adaptive equalizer to improve equalizer performance in the fading channel. The present invention uses π/4 phase rotation circuitry before a phase quantization decision is made. This π/4 phase rotation circuitry allows for decisions to be made on a QPSK constellation, rather than on an input 8PSK constellation, thus improving detection performance.

Claims

1. A receiver for processing a transmitted symbol received by way of at least two transmission paths, the transmission paths having at least some noise, said receiver comprising:

an antenna for receiving the transmitted symbol;

a downconverter for converting the received symbol into corresponding I and Q digital signals;

a matched filter coupled to the downconverter for increasing the signal to noise ratio of the I and Q digital signals;

phase rotation means for rotating the phase of the filtered I and Q digital signals by a computed amount to provide phase rotated signals;

an adaptive matched filter coupled to the phase rotation means for processing the phase rotated signals and for adaptively filtering the signals to produce phase coherent I and Q signals;

a phase extraction circuit coupled to the adaptive matched filter for converting the phase coherent I and Q signals into corresponding adaptively filtered phase signals;

a phase detection circuit coupled to the phase extraction circuit for converting the adaptively filtered phase signals into a corresponding plural bit pattern representative of the symbol; and

phase decoding means for decoding said plural bit pattern, to thereby produce the symbol.

2. A receiver for use with a modulator transmitter that is adapted to sequentially transmit digitally encoded data symbols having a predetermined phase advance sequentially encoded thereon at a predetermined transmit frequency, over a fading digital channel subject to noise and having multiple transmission paths, said receiver comprising:

an antenna for receiving the digitally encoded data symbols;

a downconverter for converting the received digitally encoded data symbols into corresponding I and Q digital signals;

a fixed matched filter having a fixed fractional tap spacing matched to the impulse response of the transmitter, coupled to the downconverter for increasing the signal to noise ratio of the I and Q digital signals;

phase rotation means for rotating the phase of the filtered I and Q digital signals by a predetermined amount to provide phase rotated signals;

an adaptive matched filter coupled to the phase rotation means for adaptively filtering the phase rotated signals, to thereby produce phase coherent I and Q signals;

a phase converter coupled to the adaptive matched filter for converting the phase coherent I and Q signals into corresponding adaptively filtered phase signals; and

phase decoding means for stripping the phase advance from the adaptively filtered phase signals, to thereby produce the symbols.

3. In a receiver, a method of processing digital I and Q samples derived from data symbols that are transmitted by way of multiple paths from a transmitter having a predetermined impulse response, in order to produce demodulated data symbols, said method comprising the steps of:

filtering the I and Q samples by means of a fixed tap filter that is matched to the impulse response of the transmitter;

rotating the phase of the filtered I and Q samples to provide phase rotated signals;

adaptively filtering the phase rotated signals;

determining the phase associated with the phase rotated signals;

decoding the phase of the signals to produce the demodulated data symbols.

4. A receiver for processing a transmitted symbol, the receiver comprising:

a downconverter for converting a receiver transmitted symbol into corresponding I and Q digital signals;

a phase rotator for rotating the phase of the I and Q digital signals by a computed amount;

an adaptive matched filter coupled to the phase rotator for adaptively filtering the signals to produce phase coherent I and Q signals from the phase rotated signals; and

a converter comprising a phase extraction circuit coupled to the adaptive matched filter for converting the phase coherent I and Q signals into corresponding adaptively filtered phase signals and then to a data symbol.

5. The receiver of claim 4 comprising an automatic frequency control tracking circuit coupled to the converter for sampling the phase of the signals in the converter and controlling the phase rotator in accordance therewith.

6. The receiver of claim 5 wherein the converter comprises a phase detection circuit for converting the coherent I and Q signals into a plural bit pattern representation of the I and Q signals and wherein the frequency tracking circuit is coupled to the converter through a first coupling to the input to the phase detection circuit and a second coupling to the output of the phase detection circuit.

7. The receiver of claim 6 wherein the frequency tracking circuit produces an estimate of the frequency of the signals in the converter for regulating the operation of the downconverter.

8. The receiver of claim 4 wherein the converter comprises a phase detection circuit coupled to the phase extraction circuit for converting the adaptively filtered phase signals into a corresponding plural bit pattern representative of the symbol.

9. The receiver of claim 6 wherein the converter comprises a phase decoder for decoding the plural bit pattern representation, to thereby produce the symbols.

10. The receiver of claim 9 wherein the phase decoder comprises a phase addition circuit for stripping a phase advance from the phase coherent I and Q signals.

11. In a receiver, a method of processing digital I and Q samples derived from data symbols that are transmitted from a transmitter having a predetermined impulse response, in order to produce demodulated data symbols, said method comprising the steps of:

filtering the I and Q samples by means of a fixed tap filter that is matched to the impulse response of the transmitter;

rotating the phase of the the filtered I and Q samples to provide phase rotated signals;

adaptively filtering the phase rotated signals;

determining the phase associated with the phase rotated signals; and

decoding the phase of the signals to produce the demodulated data symbols.

12. A receiver for processing a transmitted pi/4 QPSK symbol comprising:

a downconverter for converting the pi/4 QPSK symbol into corresponding I and Q digital signals;

a phase addition circuit for subtracting a pi/4 phase input from the I and Q signals to produce QPSK I and Q signals;

a QPSK phase detection circuit for converting the QPSK I and Q signals into a coherent bit pattern representation of the QPSK I and Q signals; and

a phase decoder for decoding the coherent bit pattern representation to produce the symbol.

13. The receiver of claim 12 wherein the phase addition circuit comprises a pi/4 phase input summer, the output of which increments each symbol and is coupled to a MOD 2 pi filter the output of which is coupled to a summer, the summer subtracting the MOD 2 pi filter output from the I and 2 signals.

14. The receiver of claim 12 further comprising a phase rotator for rotating the phase of the I and Q signals from the downconverter by a computed amount.

15. The receiver of claim 14 wherein the phase detection circuit comprises an adaptive matched filter for adaptively filtering the I and Q signals to produce phase coherent I and Q signals from the phase rotated signals.

16. The receiver of claim 14 further comprising an automatic frequency control tracking circuit coupled to the output of the phase detection circuit for sampling the phase of the signals output from the phase detection circuit and controlling the phase rotator in accordance therewith.

17. The receiver of claim 16 further comprising a phase conversion circuit for converting the QPSK I and Q signals from the phase addition circuit into pi/4 QPSK signals for sampling by the frequency tracking circuit.