Distance measuring system of an extendable strip having light reflecting and non-reflecting polygons

• US 5,313,069 A
• Filed: 12/31/1991
• Issued: 05/17/1994
• Est. Priority Date: 12/31/1991
• Status: Expired due to Fees

• Current Assignee: Trimble Navigation Limited (Trimble Inc.)
• Original Assignee: Trimble Navigation Limited (Trimble Inc.)
• Inventors: Tham, Joo L.
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): DAVENPORT, TERESA
• Application Number:
  US07/815,390
• Time in Patent Office: 868 Days
• Field of Search: 250/561, 250/237 G, 250/231.13, 250/231.14, 250/214 C, 250/238, 356/375
• US Class Current: 250/559.26
• CPC Class Codes: G01C 3/08 Use of electric radiation detectors
• CPC Class Codes: G01D 5/36 Forming the light into pulses

Abstract

Apparatus for determining the distance, accurate to within an error of no more than 1 mm, from a first position to a second position. The apparatus includes a distance marker that includes a first strip having a sequence of uniformly spaced light-reflecting (or light-transmitting) regions in one embodiment and includes a second strip having a sequence of uniformly spaced light-reflecting (or light-transmitting) regions, the two strips being positioned parallel and adjacent to each other with the positions of the light-reflecting (or light-transmitting) regions of the first strip being translated relative to the positions of the light-reflecting (or light-transmitting) regions of the second strip by a fixed translation distance. The apparatus also includes a light sensor positioned adjacent to the strip to sense each such light-reflecting region (or light-transmitting region) and/or each non-reflecting region (or non-transmitting region) as that region moves past the light sensor. When the strip is extended to measure the distance from the first position to the second position, the number of light-reflecting (or light-transmitting) regions and/or non-reflecting (or non-transmitting) regions moving past the light sensor is counted to determine the distance. When the extended portion of the distance marker is reduced in length, the counting process is reversed to determine a new distance. The number of strips on the distance marker can be increased to N≧3 for improved distance measurement accuracy.

Claims

1. Apparatus for determination of a distance or length between two spaced apart positions with an error of no more than 1 mm, the apparatus comprising:

an extendable strip of material having a length L in a strip longitudinal direction, having approximately uniform width, and having first and second sub-strips positioned adjacent to one another and extending in the strip longitudinal direction;

with the first sub-strip having a sequence of light-reflecting Polygons thereon, numbered consecutively m=1,2, . . . , M, where each such light reflecting Polygon has a center and has approximately the same shape and same width d₁ measured in the strip longitudinal direction, no two light-reflecting Polygons overlap, and Polygon number m (m=2, . . . , M-1) is spaced apart from Polygons number m-1 and m+1 along the longitudinal direction of the first sub-strip by a uniform distance d₂ measured in the strip longitudinal direction, where d₁ +d₂ ≦

4 mm, and the portion of the first sub-strip between two consecutive light-reflecting Polygons is a substantially non-reflecting region for incident light;

with the second sub-strip having a sequence of light-reflecting Polygons thereon, numbered consecutively n=1, 2, . . . , M where each such light reflecting Polygon has a center and has approximately the same shape and same width d₃ measured in the strip longitudinal direction, no two light-reflecting Polygons overlap, and Polygon number n (n=2, . . . , M-1) is spaced apart from Polygons number n-1 and n+1 along the longitudinal direction of the first sub-strip by the uniform distance d₄, where d₁ +d₂ =d₃ +d₄, and the portion of the second sub-strip between two consecutive light-reflecting Polygons is a substantially non-reflecting region for incident light, where the position of light-reflecting Polygon number p of the first sub-strip is translated by a selected distance d₅ (0<

d₅ <

d₃) relative to the position of light-reflecting Polygon number p of the second sub-strip in the longitudinal direction of the strip;

a first light source positioned adjacent to the first sub-strip to illuminate a region on the first sub-strip that includes at most one of the light-reflecting Polygons of the first sub-strip;

a first light sensor positioned adjacent to the first sub-strip to receive and sense the amount of light that is received by and reflected from the first sub-strip and to issue an electrical voltage output signal indicating the amount of light received by the first light sensor;

a first comparator module to receive a selected first offset voltage signal and the first light sensor output voltage signal at two input terminals thereof, to compare the value of the first light sensor output voltage with the first offset voltage value, to issue as an output signal a first comparator first output signal if the first light sensor output voltage value is greater than the first offset voltage value, and to issue as an output signal a first comparator second output signal if the first light sensor output voltage value is less than the first offset voltage value;

a second light source positioned adjacent to the second sub-strip to illuminate a region on the second sub-strip that includes at most one of the light-reflecting Polygons of the second sub-strip;

a second light sensor positioned adjacent to the second sub-strip to receive and sense the amount of light that is received by and reflected from the second sub-strip and to issue an electrical signal indicating the amount of the light received by the second light sensor;

a second comparator module to receive a selected second offset voltage signal and the second light sensor output voltage signal at two input terminals thereof, to compare the value of the second light sensor output voltage with the second offset voltage value, to issue as an output signal a second comparator first output signal if the second light sensor output voltage value is greater than the second offset voltage value, and to issue as an output signal a second comparator second output signal if the second light sensor output voltage value is less than the second offset voltage value;

a decoder module to receive the output signals from the first and second comparators at first and second input terminals thereof, to receive a sequence of consecutive clock pulses at a third terminal thereof, where each clock pulse is separated from the preceding clock pulse by a selected time interval of fixed length Δ

t, to generate and issue as an output signal an up-count signal that counts the number of light-reflecting Polygons, or the number of non-reflecting regions, of each sub-strip that have passed the first and second light sensors moving in a first longitudinal direction and a down-count signal that counts the number of light-reflecting Polygons, or the number of non-reflecting regions, of each sub-strip that have passed the first and second light sensors moving in a second longitudinal direction that is opposite to the first longitudinal direction; and

signal display means for receiving the first and second counting signals, for forming the difference of the count represented by the up-count signal and the count represented by the down-count signal and for displaying this difference by a visually perceptible display.

2. The apparatus of claim 1, wherein said distances d₁ and d₃ are approximately equal and said distances d₂ and d₄ are approximately equal.

3. The apparatus of claim 2, wherein said distance d₁ and d₂ are approximately equal.

4. The apparatus of claim 3, wherein said distance d₅ is approximately equal to d₁ /2.

5. The apparatus of claim 1, further comprising a third strip that does not reflect light and that is positioned between said first sub-strip and said second sub-strip.

6. The apparatus of claim 1, wherein the shape of said light-reflecting Polygon for said first sub-strip and for said second sub-strip is selected from the class of shapes consisting of triangles, quadrilaterals and ovals.

7. The apparatus of claim 1, further comprising:

a first peak detector to receive said electrical signal from said first light sensor and to determine and issue the peak voltage value of the most recently received maximum peak voltage of said first sensor output signal as said first offset voltage signal; and

a second peak detector to receive said electrical signal from said second light sensor and to determine and issue the peak voltage value of the most recently received maximum peak voltage of said second sensor output signal as said second offset voltage signal.

8. The apparatus of claim 1, wherein said decoder module comprises:

first, second, third and fourth, latch type flipflops, each having a data input terminal, a clock input terminal and first and second output terminals that issue a logical output signal and the logical complement of this logical output signal, respectively, where the clock input terminals of the third and fourth flipflops receive said sequence of clock pulses and the clock input terminals of the first and second flipflops receive the logical complement of said sequence of clock pulses;

where the data input terminals of the first and second flipflops receive said first and second comparator output signals, respectively, and the data input terminals of the third and fourth flipflops receive the logical output signals from the first and second flipflops, respectively;

first, second, third and fourth two-input EX-OR gates, where the first EX-OR gate receives the logical output signals from the second and third flipflops and forms and issues the Exclusive-OR product of the two input signals, where the second EX-OR gate receives the logical output signal from the first flipflop and the logical complement of the logical output signal from the fourth flipflop and forms and issues the Exclusive-OR product of the two input signals, where the third EX-OR gate receives the logical output signals from the first and fourth flipflops and forms and issues the Exclusive-OR product of the two input signals, and where the fourth EX-OR gate receives the logical output signal from the second flipflop and the logical complement of the logical output signal from the third flipflop and forms and issues the Exclusive-OR product of the two input signals;

a first AND gate that receives the output signals from the first and second EX-OR gates and forms and issued the logical product of the two input signals;

a second AND gate that receives the output signals from the third and fourth EX-OR gates and forms and issues the logical product of the two input signals; and

an up-down counter that receives the output signals from the first and second AND gates and determines said numbers of light-reflecting regions and non-reflecting regions of each of said sub-strips that have passed said first and second light sensors moving in said first longitudinal direction and said number of light-reflecting regions and non-reflecting regions of each of said sub-strips that have passed said first and second light sensors moving in said first second longitudinal direction.

9. The apparatus of claim 1, wherein said decoder module comprises a computer having an associated counter and a software program that is executable on the computer, where the computer executes the software program by the following actions:

(1) the computer initializes the counter and defines initial values of said variables V_A and V_B by setting V_A (t=t₀) and V_B (t=t₀) equal to selected initial voltage values, where t₀ is a selected initial time, and sets an integer m=0 initially;

(2) the computer receives said variables V_A (t) and V_B (t) for t=t₀ +m(Δ

t) and forms the quantity V_u (t)=[V_A (t)⊕

V_B (t-Δ

t)*]·

[V_A (t-Δ

t)⊕

V_B (t)] and determines whether V_u (t) has a high value or a low value relative to a predetermined intermediate value;

(3) if V_u (t) has a high value, the computer increments the counter by one unit and proceeds to step (9);

(4) if V_u (t) has a low value, the computer forms the quantity V_d (t)=[V_A (t)⊕

V_B (t-Δ

t)]·

[V_A (t-Δ

t)*⊕

V_B (t)] and proceeds to step (5);

(5) if V_d (t) is high, the computer decrements the counter by one unit and proceeds to step (9);

(6) if V_d (t) is low, the computer forms the quantity V_e (t)=[V_A (t)⊕

V_A (t-Δ

t)]·

[V_B (t-Δ

t)⊕

V_B (t)];

(7) if V_e (t) is low, the computer proceeds to step (9);

(8) if V_e (t) is high, the computer stops its activity and indicates that a signal error is present;

(9) the computer determines if execution of the software program should continue;

(10) if execution of the software program should continue, the computer replaces the integer m by m+1 and proceeds to step (2); and

(11) if execution of the software program should not continue, the computer stops its activity and displays a signal representing the value of the counter, as incremented or decremented, by a visually perceptible display.

10. Apparatus for determination of a distance or length between two spaced apart positions with an error of no more than 1 mm, the apparatus comprising:

an extendable strip of material having a length L in a strip longitudinal direction, having approximately uniform width, and having first and second sub-strips positioned adjacent to one another and extending in the strip longitudinal direction;

with the first sub-strip having a sequence of light-transmitting Polygons thereon, numbered consecutively m=1, 2, . . . , M, where each such light-transmitting Polygon has a center and has approximately the same shape and same width d₁ measured in the strip longitudinal direction, no two light-transmitting Polygons overlap, and Polygon number m (m=2, . . . , M-1) is spaced apart from Polygons number m-1 and m+1 along the longitudinal direction of the first sub-strip by a uniform distance d₂ measured in the strip longitudinal direction, where d₁ +d₂ ≦

4 mm, and the portion of the first sub-strip between two consecutive light-transmitting Polygons is a substantially non-transmitting region for incident light;

with the second sub-strip having a sequence of light-transmitting Polygons thereon, numbered consecutively n=1, 2, . . . , M where each such light-transmitting Polygon has a center and has approximately the same shape and same width d₃ measured in the strip longitudinal direction, no two light-transmitting Polygons overlap, and Polygon number n (n=2, . . . , M-1) is spaced apart from Polygons number n-1 and n+1 along the longitudinal direction of the first sub-strip by the uniform distance d₄, where d₁ +d₂ =d₃ +d₄, and the portion of the second sub-strip between two consecutive light-transmitting Polygons is a substantially non-transmitting region for incident light, where the position of light-transmitting Polygon number p of the first sub-strip is translated by a selected distance d₅ (0<

d₅ <

d₃) relative to the position of light-transmitting Polygon number p of the second sub-strip in the longitudinal direction of the strip;

a first light source positioned adjacent to the first sub-strip to illuminate a region on the first sub-strip that includes at most one of the light-transmitting Polygons of the first sub-strip;

a first light sensor positioned adjacent to the first sub-strip to receive and sense the amount of light that is received by and transmitted through the first sub-strip and to issue an electrical output signal indicating the amount of light received by the first light sensor;

a first comparator module to receive a selected first offset voltage signal and the first light sensor output voltage signal at two input terminals thereof, to compare the value of the first light sensor output voltage with the first offset voltage value, to issue as an output signal a first comparator first output signal if the first light sensor output voltage value is greater than the first offset voltage value, and to issue as an output signal a first comparator second output signal if the first light sensor output voltage value is less than the first offset voltage value;

a second light source positioned adjacent to the second sub-strip to illuminate a region on the second sub-strip that includes at most one of the light-transmitting Polygons of the second sub-strip;

a second light sensor positioned adjacent to the second sub-strip to receive and sense the amount of light that is received by and transmitted through the second sub-strip and to issue an electrical signal indicating the amount of light received by the second light sensor;

a second comparator module to receive a selected second offset voltage signal and the second light sensor output voltage signal at two input terminals thereof, to compare the value of the second light sensor output voltage with the second offset voltage value, to issue as an output signal a second comparator first output signal if the second light sensor output voltage value is greater than the second offset voltage value, and to issue as an output signal a second comparator second output signal if the second light sensor output voltage value is less than the second offset voltage value;

a decoder module to receive the output signals of the first and second comparators at first and second input terminals thereof, to receive a sequence of consecutive clock pulses at a third terminal thereof, where each clock pulse is separated from the preceding clock pulse by a selected time interval of fixed length Δ

t, to generate and issue as an output signal an up-count signal that counts the number of light-transmitting Polygons, or the number of non-transmitting regions, of each sub-strip that have passed the first and second light sensors moving in a first longitudinal direction and a down-count signal that counts the number of light-transmitting Polygons, or the number of non-transmitting regions, of each sub-strip that have passed the first and second light sensors moving in a second longitudinal direction that is opposite to the first longitudinal direction; and

signal display means for receiving the first and second counting signals, for forming the difference of the count represented by the up-count signal and the count represented by the down-count signal and for displaying this difference by a visually perceptible display.

11. The apparatus of claim 10, wherein said distances d₁ and d₃ are approximately equal and said distances d₂ and d₄ are approximately equal.

12. The apparatus of claim 11, wherein said distances d₁ and d₂ are approximately equal.

13. The apparatus of claim 12, wherein said distance d₅ is approximately equal to d₁ /2.

14. The apparatus of claim 10, further comprising a third strip that does not transmit light and that is positioned between said first sub-strip and said second sub-strip.

15. The apparatus of claim 10, wherein the shape of said light-transmitting Polygon for said first sub-strip and for said second sub-strip is selected from the class of shapes consisting of triangles, quadrilaterals and ovals.

16. The apparatus of claim 10, further comprising:

a first peak detector to receive said electrical signal from said first light sensor and to determine and issue the peak voltage value of the most recently received maximum peak voltage of said first sensor output signal as said first offset voltage signal; and

a second peak detector to receive said electrical signal from said second light sensor and to determine and issue the peak voltage value of the most recently received maximum peak voltage of said second sensor output signal as said second offset voltage signal.

17. The apparatus of claim 10, wherein said decoder module comprises:

first, second, third and fourth, latch type flipflops, each having a data input terminal, a clock input terminal and first and second output terminals that issue a logical output signal and the logical complement of this logical output signal, respectively, where the clock input terminals of the third and fourth flipflops receive said sequence of clock pulses and the clock input terminals of the first and second flipflops receive the logical complement of said sequence of clock pulses;

where the data input terminals of the first and second flipflops receive said first and second comparator output signals, respectively, and the data input terminals of the third and fourth flipflops receive the logical output signals from the first and second flipflops, respectively;

first, second, third and fourth two-input EX-OR gates, where the first EX-OR gate receives the logical output signals from the second and third flipflops and forms and issues the Exclusive-OR product of the two input signals, where the second EX-OR gate receives the logical output signal from the first flipflop and the logical complement of the logical output signal from the fourth flipflop and forms and issues the Exclusive-OR product of the two input signals, where the third EX-OR gate receives the logical output signals from the first and fourth flipflops and forms and issues the Exclusive-OR product of the two input signals, and where the fourth EX-OR gate receives the logical output signal from the second flipflop and the logical complement of the logical output signal from the third flipflop and forms and issues the Exclusive-OR product of the two input signals;

a first AND gate that receives the output signals from the first and second EX-OR gates and forms and issued the logical product of the two input signals;

a second AND gate that receives the output signals from the third and fourth EX-OR gates and forms and issues the logical product of the two input signals; and

an up-down counter that receives the output signals from the first and second AND gates and determines said numbers of light-transmitting regions and non-transmitting regions of each of said sub-strips that have passed said first and second light sensors moving in said first longitudinal direction and said number of light-transmitting regions and non-transmitting regions of each of said sub-strips that have passed said first and second light sensors moving in said second longitudinal direction.

18. The apparatus of claim 10, wherein said decoder module comprises a computer having an associated counter and a software program that is executable on the computer, where the computer executes the software program by the following actions:

(1) the computer initializes the counter and defines initial values of said variables V_A and V_B by setting V_A (t=t₀) and V_B (t=t₀) equal to selected initial voltage values, where t₀ is a selected initial time, and sets an integer m=0 initially;

(2) the computer receives said variables V_A (t) and V_B (t) for t=t₀ +m(Δ

t) and forms the quantity V_u (t)=[V_A (t)⊕

V_B (t-Δ

t)*]·

[V_A (t-Δ

t)⊕

V_B (t)] and determines whether V_u (t) has a high value or a low value relative to a predetermined intermediate value;

(3) if V_u (t) has a high value, the computer increments the counter by one unit and proceeds to step (9);

(4) if V_u (t) has a low value, the computer forms the quantity V_d (t)=[V_A (t)⊕

V_B (t-Δ

t)]·

[V_A (t-Δ

t)*⊕

V_B (t)] and proceeds to step (5);

(5) if V_d (t) is high, the computer decrements the counter by one unit and proceeds to step (9);

(6) if V_d (t) is low, the computer forms the quantity V_e (t)=[V_A (t)⊕

V_A (t-Δ

t)]·

[V_B (t-Δ

t)⊕

V_B (t)];

(7) if V_e (t) is low, the computer proceeds to step (9);

(8) if V_e (t) is high, the computer stops its activity and indicates that a signal error is present;

(9) the computer determines if execution of the software program should continue;

(10) if execution of the software program should continue, the computer replaces the integer m by m+1 and proceeds to step (2); and

(11) if execution of the software program should not continue, the computer stops its activity and displays a signal representing the value of the counter, as incremented or decremented, by a visually perceptible display.