Network for minimizing current imbalances in a faradaic battery

• US 5,313,152 A
• Filed: 06/19/1992
• Issued: 05/17/1994
• Est. Priority Date: 06/19/1992
• Status: Expired due to Term

• Current Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Original Assignee: Ford Motor Company
• Inventors: Wozniak, Walter, Haskins, Harold J.
• Primary Examiner(s): KINCAID, KRISTINE LYNN
• Application Number:
  US07/901,002
• Time in Patent Office: 697 Days
• Field of Search: 320/17, 320/18, 320/43, 320/44, 320/48, 320/6, 320/15, 320/13, 307/64, 307/66, 324/427, 324/433, 324/434
• US Class Current: 320/118
• CPC Class Codes: G01R 15/04 Voltage dividers
• CPC Class Codes: G01R 19/16542 for batteries charge condition monitoring in G01R31/36
• CPC Class Codes: G01R 31/378 specially adapted for the type of battery or accumulator
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: H02J 7/0016 using shunting, discharge or bypass circuits
• CPC Class Codes: Y02T 10/70 Energy storage systems for electromobility, e.g. batteries

Abstract

A circuit for connecting a faradaic battery with circuitry for monitoring the condition of the battery includes a plurality of voltage divider networks providing battery voltage monitoring nodes and includes compensating resistors connected with the networks to maintain uniform discharge currents through the cells of the battery. The circuit also provides a reduced common mode voltage requirement for the monitoring circuitry by referencing the divider networks to one-half the battery voltage.

Claims

1. A circuit for connecting a faradaic battery with means for monitoring the condition of the battery, said battery comprising a plurality of serially connected modules (VS₁ . . . VS_n) each having positive and negative terminals, said battery having a reference node establishing a reference voltage at one of the terminals of one of the modules (VS₁ . . . VS_n), said circuit comprising:

a plurality of voltage divider networks (VD₁ . . . VD_n), each including a monitoring node and first and second terminating nodes;

one terminating node of each of said networks being connected to said reference node;

the other terminating node of each of said networks being connected to the other of said terminals of respective ones of said modules (VS₁ . . . VS_n) to draw currents (I₁ . . . I_n) respectively;

compensating network means including resistors (CR₁ . . . CR_n) respectively connecting said other of said terminals of respective ones of said modules (VS₁ . . . VS_n-1) to the other of said terminals of the last of said serially connected modules (VS_n), the resistors (CR₁ . . . CR_n) being respectively sized to draw currents substantially equal to the respective currents (I₁ . . . I_n-1);

whereby the current drawn by the compensating network means of the battery is substantially uniform and equal to the sum of currents flowing in the divider networks (VD₁ . . . VD_n).

2. The circuit of claim 1 wherein the divider networks (VD₁ . . . VD_n) each include a first resistor (R₁ . . . R_n) connected between said monitoring node and said first terminating node and a second resistor (RF₁ . . . RF_n) connected between said monitoring node and said second terminating node.

3. The circuit of claim 2 wherein voltage across each of said modules is substantially equal.

4. The circuit of claim 3 wherein the current drawn by each divider network is substantially equal.

5. The circuit of claim 4 wherein each of said second terminating nodes is connected to said reference node and each of said second resistors (RF₁ . . . RF_n) is of substantially equal resistance value.

6. The circuit of claim 5 wherein the sum of the resistors in the "last" voltage divider network is substantially equal to the sum of the resistors in the respective voltage divider networks (VD₁ . . . VD_n-1) added to the compensating resistors (CR₁ . . . CR_n-1) respectively.

7. In combination with a faradaic battery and means for monitoring the condition of the battery, said battery comprising a plurality of serially connected modules including at least first, second, third and fourth modules, each having positive and negative terminals, the negative terminal of said first module and the positive terminal of said second module being connected together and to a reference node to establish a reference voltage equal to one-half the total battery voltage, a circuit comprising:

first and second voltage divider networks, connected across said first and second modules respectively, said first network including first and second resistor means, with a first monitoring node therebetween, said second network including third and fourth resistor means, with a second monitoring node therebetween;

a third voltage divider network connected across said first and third serially connected modules, said third network including fifth and sixth resistor means, with a third monitoring node therebetween;

a fourth voltage divider networks connected across said second and fourth serially connected modules, said fourth network including seventh and eighth resistor means, with a fourth monitoring node therebetween;

first and second compensating resistor means connected across said third and fourth modules respectively;

means connecting said first, second, third and fourth monitoring nodes to said monitoring means;

said compensating resistor means and the resistor means in said networks being sized to insure that current drawn by said monitoring means from said first, second, third and fourth modules is substantially equal.

8. The combination comprising:

a faradaic battery comprising a first bank of "n" serially connected modules each having positive and negative terminals, n being an integer greater than one;

monitoring means for monitoring the condition of said battery;

"n" voltage divider networks each including a first monitoring node and first and second network terminating nodes, first and second resistors respectively connected between the monitoring node and said first and second terminating nodes, means connecting each of said first monitoring nodes to said monitoring means, the second terminating node of each of said networks being connected to a reference node at the negative terminal of the first of said "n" modules;

the first terminating node of said "n" networks being connected to the positive terminal of respective ones of said "n" modules;

"n-1" compensating resistors respectively connecting the positive terminal of the "nth" module to the positive terminal of the remaining ones of said "n" modules;

said "n-1" compensating resistors and the resistors in said "n" networks being sized to produce equal discharge current from each module during monitoring of the voltage across the modules.

9. The invention defined in claim 8 further comprising a second bank of "m" serially connected modules each having positive and negative terminals, m being an integer greater than one, the positive terminal of the first of said "m" modules connected with the negative terminal of the first of said "n" modules;

"m" voltage divider networks each including a second monitoring node and third and fourth network terminating nodes, third and fourth resistors respectively connected between said second monitoring node and said third and fourth terminating nodes, means connecting each of said second monitoring nodes to said monitoring means, the second terminating node of each of said "m" networks being connected to said reference node to establish a reference voltage of one-half the total battery voltage;

the first terminating node of each of said "m" networks being connected to the negative terminal of respective ones of said "m" modules;

"m-1" compensating resistors respectively connecting the negative terminal of the "mth" module to the negative terminal of the remaining ones of said "m" modules;

said "m-1" compensating resistors and the resistors in said "m" networks being sized to produce equal discharge current from each module during monitoring of the voltage across the modules.