Apparatus for testing ATM channels

• US 5,313,453 A
• Filed: 03/20/1992
• Issued: 05/17/1994
• Est. Priority Date: 03/20/1991
• Status: Expired due to Term

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Murayama, Masami, Uchida, Yoshihiro, Aso, Yasuhiro, Izawa, Naoyuki, Kakuma, Satoshi, Yoshimura, Shuji
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): HSU, ALPUS
• Application Number:
  US07/854,888
• Time in Patent Office: 788 Days
• Field of Search: 370/13, 370/14, 370/15, 370/53, 370/54, 370/58.1, 370/58.2, 370/58.3, 370/60, 370/94.1
• US Class Current: 370/248
• CPC Class Codes: H04J 2203/0019 Multicast/broadcast capabilities
• CPC Class Codes: H04L 1/0083 Formatting with frames or packets; Protocol or part of protocol for error control
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/5628 Testing
• CPC Class Codes: H04L 2012/5672 Multiplexing, e.g. coding, scrambling
• CPC Class Codes: H04L 2012/5681 Buffer or queue management
• CPC Class Codes: H04L 43/50 Testing arrangements
• CPC Class Codes: H04L 49/1553 Interconnection of ATM switching modules, e.g. ATM switching fabrics
• CPC Class Codes: H04L 49/255 Control mechanisms for ATM switching fabrics
• CPC Class Codes: H04L 49/309 Header conversion, routing tables or routing tags
• CPC Class Codes: H04Q 11/0478 Provisions for broadband connections

Abstract

A first form of an ATM channel testing apparatus tests an ATM channel by having a test cell detector in each switch to detect whether or not the switch appropriately switches a test cell generated by a test cell generating trunk. A second form of an ATM channel testing apparatus easily tests an ATM channel by having test cell generators provided for the respective input highways sequentially generating test cells including test cell identifying information and input highway identifying information, and having test cell checkers provided respectively for the output highways simply tally the test cells by the respective input highways. A third form of an ATM channel testing apparatus tests an ATM channel with less pieces of hardware by having turnaround parts in respective ordinary trunks sequentially turn around a test cell generated by a test cell generating trunk to be finally returned to the test cell generating trunk. A fourth form of an ATM channel testing apparatus tests an ATM channel by having a test cell checker provided for each of output highways to examine whether or not the test data carried in respective octets of the payloads in extracted test cells are of consecutive values.

Claims

1. An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel, the asynchronous transfer mode channel having switches therein to direct traffic, comprising:

test cell generating trunk means, provided on an input side of said asynchronous transfer mode channel, for generating a test cell having a tag attached to a header thereof, the tag including test cell information which specifies a particular path in the asynchronous transfer mode channel to be tested, said test cell generating trunk means supplying the test cell to the asynchronous transfer mode channel to be tested;

test cell detecting means, provided in each of a plurality of switches of the asynchronous transfer mode channel, for detecting whether a switch along the particular path specified by the test cell has been switched and providing a maintenance scan signal indicative of a result of the detecting means; and

controlling means for testing the switch along the particular path specified by the test cell by judging whether said test cell detecting means provides the maintenance scan signal.

2. The asynchronous transfer mode channel testing apparatus according to claim 1, wherein

the asynchronous transfer mode channel is a multistage self-routing channel having self-routing modules connected in plural stages, the switches being provided in each of the self-routing modules.

3. The asynchronous transfer mode channel testing apparatus according to claim 1, wherein

a plurality of said test cell generating trunk means are provided for each input highway to the asynchronous transfer mode channel to multiplex the test cell on the input highway at a corresponding free cell timing of the input highway.

4. The asynchronous transfer mode channel testing apparatus according to claim 3, wherein

each of said plurality of test cell generating trunk means comprises means for generating the test cell having the tag, the tag further including test cell information identifying one of the switches along the asynchronous transfer mode channel corresponding to the input highway in which said test cell generating trunk means is provided.

5. The asynchronous transfer mode channel testing apparatus according to claim 1, wherein

said controlling means comprises means for testing the switch along the particular path specified by the test cell by judging whether said test cell detecting means in the switch provided the maintenance scan signal in a predetermined period of time after the test cell is generated by said test cell generating trunk means.

6. An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel having self-routing modules connected in multiple stages for switching cells supplied from a plurality of input highways to a plurality of output highways, the self-routing modules having crossing points to pass cells, said asynchronous transfer mode channel testing apparatus comprising:

test cell generating means, provided respectively in the input highways, for sequentially generating a plurality of test cells on all possible paths of the self-routing modules to enable the crossing points of the self-routing modules to pass cells inputted from the input highways, the test cells being generated with test cell identifying information for identifying themselves as test cells and also being generated with input highway identifying information; and

test cell checking means, provided respectively in the output highways, for checking whether a predetermined number of test cells were detected by identifying test cells through extraction of the test cell identifying information from the test cells output from the self-routing modules to the output highways and by extracting the input highway identifying information from the identified test cells.

7. The asynchronous transfer mode channel testing apparatus according to claim 6, wherein

said test cell generating means further comprise virtual channel converters and comprise means for converting virtual path identifiers or virtual channel identifiers to pieces of tag information, and

said test cell generating means comprises means for generating the test cells having the pieces of tag information, the tag information specifying the crossing points in the self-routing modules to switch cells.

8. The asynchronous transfer mode channel testing apparatus according to claim 7, wherein

said test cell generating means further comprises means for attaching the input highway identifying information and the test cell identifying information to free regions in the tag information in a header of the test cells and for storing the pieces of said tag information attached to the test cell in one of said virtual channel converters.

9. The asynchronous transfer mode channel testing apparatus according to claim 6, wherein

said test cell checking means comprises means for testing the self-routing modules by checking whether a predetermined number of test cells from each of the input highways were detected during a predetermined period of time after said test cell generating means began generation of the test cells.

10. An asynchronous transfer mode channel testing apparatus for testing a plurality of trunks used for interfacing with foreign offices and for testing an asynchronous transfer mode channel used for switching cells inputted from plural input highways through the trunks to a plurality of output highways, said asynchronous transfer mode channel apparatus, comprising:

test cell generating trunk means, provided on the input side of the asynchronous transfer mode channel, for generating a test cell having a test cell identification bit in a header thereof, the test cell identification bit identifying the cell of the header as a test cell, said test cell generating trunk means supplying the test cell to the asynchronous transfer mode channel; and

turnaround means, provided the trunks, for identifying a test cell by extracting the test cell identification bit from cells sent through tested paths of the asynchronous transfer mode channel, and for returning the extracted test cell to the tested paths of the asynchronous transfer mode channel.

11. The asynchronous transfer mode channel testing apparatus according to claim 10, wherein

said test cell generating trunk means comprises means for storing cell path selection information in the header of the test cell which specifies particular paths in the asynchronous transfermode channel to be tested, and

said asynchronous transfer mode channel testing apparatus further comprises tag operating means for replacing a tag attached to the header of the test cell returned by said turnaround means with another tag based on the cell path selection information stored in the header of the test cell, said tag operating means supplying the test cell to the asynchronous transfer mode channel.

12. The asynchronous transfer mode channel testing apparatus according to claim 11, wherein

said test cell generating trunk means further comprises means for attaching to the header of the test cell a tag capable of addressing a first one of the trunks on particular paths to be tested.

13. The asynchronous transfer mode channel testing apparatus according to claim 10, wherein:

said test cell generating trunk means comprises means for storing cell path selection information in the header of the test cell which specifies particularly paths terminated at said test cell generating trunk means in the asynchronous trunk mode channel to be tested; and

said asynchronous transfer mode channel testing apparatus further comprises controlling means for testing the asynchronous transfer mode channel by judging whether the test cell generated from said test cell generating trunk means returns to said test cell generating trunk means and by comparing whether the test cell generated by said test cell generating trunk means and the test cell returned to said test cell generating trunk means have the same content.

14. The asynchronous transfer mode channel testing apparatus according to claim 10, wherein

said turnaround means comprises means for returning the extracted test cell around to the tested paths on the asynchronous transfer mode channel at the corresponding free cell timings of the input highways.

15. An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel formed by self-routing modules connected in multiple stages for switching cells supplied from a plurality of input highways respectively to a plurality of output highways, comprising:

test cell inserting means, provided respectively in said input highways, for sequentially generating a plurality of test cells carrying virtual identifiers indicating test cells in their headers and test data in their payloads;

test cell tag attaching means, provided respectively in said input highways, for attaching, to test cells multiplexed respectively over to said input highways by said test cell inserting means, tags enabling switching operations to be performed at desired crossing points in said self-routing modules; and

test cell checking means, provided respectively in said output highways, for extracting test cells by identifying virtual identifiers attached to the headers of cells outputted to said output highways from said self-routing modules, and for examining test data attached to the payloads to said test cells thus extracted.

16. The asynchronous transfer mode channel testing apparatus according to claim 15, wherein:

said test cell inserting means multiplexes one of said test cells each time a predetermined number of cells other than a test cell pass through on the corresponding one of said input highways.

17. An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel formed by self-routing modules connected in multiple stages for switching cells supplied from a plurality of input highways respectively to a plurality of output highways, comprising:

test cell inserting means, provided respectively in said input highways, for sequentially generating a plurality of test cells carrying virtual identifiers indicating test cells in their headers and test data in their payloads, wherein

said test cell inserting means attaches, to respective octets of the payloads of said test cells, consecutive values sequentially incremented or decremented from the values in the header octets of said payloads;

test cell tag attaching means, provided respectively in said input highways, for attaching, to test cells multiplexed respectively over to said input highways by said test cell inserting means, tags enabling switching operations to be performed at desired crossing points in said self-routing modules; and

test cell checking means, provided respectively in said output highways, for extracting test cells by identifying virtual identifiers attached to the headers of cells outputted to said output highways from said self-routing modules, and for examining test data attached to the payloads to said test cells thus extracted, wherein

said test cell checking means examines the payload abnormality of said test cells by judging whether said test data values attached to respective octets in the payloads of said test cells extracted are said consecutive values sequentially incremented or decremented.

18. An asynchronous transfer mode channel testing apparatus for testing an asynchronous transfer mode channel formed by self-routing modules connected in multiple stages for switching cells supplied from a plurality of input highways respectively to a plurality of output highways, comprising:

test cell inserting means, provided respectively in said input highways, for sequentially generating a plurality of test cells carrying virtual identifiers indicating test cells in their headers and test data in their payloads, wherein

said test cell inserting means, generates successively in a predetermined number and attaches to respective octets of payloads of respective test cells, consecutive values sequentially incremented or decremented from the values in the header octets of the payload of a first test cell of said predetermined number of test cells, wherein

test cell tag attaching means, provided respectively in said input highways, for attaching, to test cells multiplexed respectively over to said input highways by said test cell inserting means, tags enabling switching operations to be performed at desired crossing points in said self-routing modules, wherein

said test cell tag attaching means attaches the same tag to each of said predetermined number of test cells multiplexed successively over to said input highways by said test cell inserting means; and

test cell checking means, provided respectively in said output highways, for extracting test cells by identifying virtual identifiers attached to the headers of cells outputted to said output highways from said self-routing modules, and for examining test data attached to the payloads to said test cells thus extracted, wherein

said test cell checking means examines the payload abnormality and loss of each of said test cells by judging whether said test data values attached to respective octets of the payloads in each of said test cells successively extracted are consecutive values sequentially incrementing or decrementing starting from the test data values in the header octet.