Computer process for interconnecting logic circuits utilizing softwire statements
First Claim
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1. A computer process for interconnecting logic circuits on an integrated circuit substrate;
- said process including the steps of;
providing a set of files for said computer which identify--a) blockages, including said logic circuits and pre-existing interconnections on said substrate, b) terminals on said logic circuits that are to be interconnected, and c) a set of layout parameters;
finding, via said computer, an open space on said substrate which goes from one of said terminals to another;
locating, via said computer, relative jog points in said open space with the location of each jog point being established in terms of said layout parameters relative to a respective blockage such that said jog points move as their respective blockage move and/or layout parameters change; and
,generating, via said computer, a softwire statement that specifies an interconnection from said one terminal to said another terminal as a series of conductor segments which extend in certain directions from said jog points and which stretch/contract as said blockages and jog points move.
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Abstract
A computer process interconnects logic circuit on an integrated circuit substrate by generating a single softwire statement for each interconnection, and by thereafter utilizing the softwire statements to generate multiple physical layouts for each interconnection. A "softwire statement" is a computer-generated statement which specifies and establishes a route for an interconnection from one terminal of a logic circuit to another terminal as a series of conductive segments which extend in certain directions between relative jog points that are referenced to blockages such as the logic circuits, on the substrate.
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Citations
12 Claims
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1. A computer process for interconnecting logic circuits on an integrated circuit substrate;
- said process including the steps of;
providing a set of files for said computer which identify--a) blockages, including said logic circuits and pre-existing interconnections on said substrate, b) terminals on said logic circuits that are to be interconnected, and c) a set of layout parameters; finding, via said computer, an open space on said substrate which goes from one of said terminals to another; locating, via said computer, relative jog points in said open space with the location of each jog point being established in terms of said layout parameters relative to a respective blockage such that said jog points move as their respective blockage move and/or layout parameters change; and
,generating, via said computer, a softwire statement that specifies an interconnection from said one terminal to said another terminal as a series of conductor segments which extend in certain directions from said jog points and which stretch/contract as said blockages and jog points move. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
- said process including the steps of;
Specification