Circuit for measuring capacitance at high DC bias voltage

• US 5,321,367 A
• Filed: 09/21/1992
• Issued: 06/14/1994
• Est. Priority Date: 09/21/1992
• Status: Expired due to Fees

• Current Assignee: United States Of America As Represented By The Secretary Of The Army (Government of the United States of America)
• Original Assignee: The United States Of America As Represented By The Secretary Of The Army
• Inventors: Koscica, Thomas E., Babbitt, Richard W.
• Primary Examiner(s): Wieder, Kenneth A.
• Assistant Examiner(s): TOBIN, C
• Application Number:
  US07/947,600
• Time in Patent Office: 631 Days
• Field of Search: 324/76.66, 324/658, 324/663, 324/676, 324/678, 324/681, 340/870.37
• US Class Current: 324/663
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24

Abstract

A circuit for measuring capacitor properties under high DC bias voltage. Aapacitor is subject to a high DC bias by a high voltage supply having low AC impedance. A triangle wave voltage is applied to the capacitor at the terminal opposite the high bias voltage. A current is thereby induced due to the voltage difference across the capacitor generated by the triangle wave. The induced current is measured and properties of the capacitor calculated therefrom. The measuring circuitry is isolated from the high DC bias voltage applied to the capacitor. Therefore, the biasing voltage applied to the capacitor is limited only by the breakdown voltage of the capacitor under test.

Claims

1. A circuit for measuring capacitance at any DC bias voltage comprising;

a device under test to measure its capacitance having at least two opposite terminals;

voltage supply means for applying a DC bias voltage to the device under test, said voltage supply means having a low AC impedance and being connected to one of the terminals of the device under test;

switch means for switching between a device under test charging position and a device under test measuring position, said switch means being connected to the terminal of the device under test opposing the voltage supply means;

device under test charging means coupled to the switch means at the device under test charging position;

square wave generating means;

triangle wave generating means, coupled in series with the square wave generating means, for applying a voltage waveform to the device under test from the measuring position of the switch means, the triangle wave being an integration of the square wave, wherein the generated triangle wave induces a current when the switch means is switched to the device under test measuring position;

induced current sense means, coupled to said switch means at the device under test measuring position and coupled to an output of the triangle wave generating means, for detecting the induced current resulting from the application of the voltage waveform from the triangle wave generating means; and

a quadrature demodulation circuit coupled to an output of the induced current sense means and the square wave generating means, wherein the quadrature demodulation circuit uses the square wave to generate a DC output voltage from the output of the induced current sense means, and wherein the DC output voltage is in a linear relation to the capacitance of the device under test.

2. A circuit for measuring the dielectric constant of a device under test at any DC bias voltage comprising;

a device under test to measure its dielectric constant having at least two opposite terminals;

voltage supply means for applying a DC bias voltage to the device under test, said voltage supply means having a low AC impedance and being connected to one of the terminals of the device under test;

switch means for switching between a device under test charging position and a device under test measuring position, said switch means being connected to the terminal of the device under test opposing the voltage supply means;

device under test charging means coupled to the switch means at the device under test charging position;

square wave generating means;

triangle wave generating means, coupled in series with the square wave generating means, for applying a voltage waveform to the device under test from the measuring position of the switch means, the triangle wave being an integration of the square wave, wherein the generated triangle wave induces a current when the switch means is switched to the device under test measuring position;

induced current sense means, coupled to said switch means at the device under test measuring position and coupled to an output of the triangle wave generating means, for detecting the induced current resulting from the application of the voltage waveform from the triangle wave generating means; and

a quadrature demodulation circuit coupled to an output of the induced current sense means and the square wave generating means, wherein the quadrature demodulation circuit uses the square wave to generate a DC output voltage from the output of the induced current sense means, and wherein the DC output voltage is in a linear relation to the dielectric constant of the device under test.