Method for forming deep conductive feedthroughs

• US 5,322,816 A
• Filed: 01/19/1993
• Issued: 06/21/1994
• Est. Priority Date: 01/19/1993
• Status: Expired due to Term

• Current Assignee: Hughes Aircraft Company (Rtx Corporation)
• Original Assignee: Hughes Aircraft Company (Rtx Corporation)
• Inventors: Pinter, Jerald F.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): HOLTZMAN, LAURA
• Application Number:
  US08/006,215
• Time in Patent Office: 518 Days
• Field of Search: 437/203, 437/915, 437/919, 148/DIG. 135, 148/DIG. 164
• US Class Current: 438/667
• CPC Class Codes: H01L 21/76251 using bonding techniques
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: Y10S 148/135 Removal of substrate
• CPC Class Codes: Y10S 148/164 Three dimensional processing
• CPC Class Codes: Y10S 438/928 Front and rear surface processing
• CPC Class Codes: Y10S 438/973 Substrate orientation

Abstract

An interconnect layer (40) for interposing between two active circuit layers of a multi-chip module (50). The interconnect layer includes a layer of silicon (14) having first surface and second surfaces. A first layer of dielectric material (16) is disposed over the first surface and a second layer of dielectric material (12) disposed over the second surface. The interconnect layer includes at least one electrically conductive feedthrough (42) that is formed within an opening made through the layer of silicon. The opening has sidewalls (22) that are coated with a dielectric material (24) and an electrically conductive material for providing a topside contact (26). A second contact (28) is formed from the backside of the silicon layer after removing the substrate (10). In accordance with the invention, the sidewalls have a slope associated therewith such that an area of the opening is larger at the first surface of the silicon layer than at the second surface of the silicon layer, thereby improving the contact metal step coverage. The silicon layer is comprised of <100> silicon and has a thickness in the range of approximately 10 micrometers to approximately 50 micrometers. The opening is etched through the <100> silicon layer with KOH to provide an inwardly sloping sidewall profile having an angle that is approximately equal to 54.7 degrees.

Claims

1. A method of forming an electrically conductive feedthrough within a semiconductor layer, comprising the steps of:

providing a multilayered structure that includes a substrate, a layer of dielectric material having a first surface that overlies a surface of the substrate and a second surface that is opposite to the first surface, and a semiconductor layer having a first surface that overlies the second surface of the layer of dielectric material and a second surface that is opposite the first surface of the semiconductor layer;

forming at least one opening through the semiconductor layer to expose an underlying portion of the second surface of the dielectric layer, the opening having sidewalls that are coated with a dielectric material, the sidewalls having a slope associated therewith such that an area of the opening is larger at the second surface of the semiconductor layer than at the first surface of the semiconductor layer;

depositing an electrically conductive material upon the tapered sidewalls and upon the exposed portion of the second surface of the dielectric layer;

removing the substrate to expose the first surface of the dielectric layer;

forming an opening through the dielectric layer, the opening being formed in registration with the opening through the semiconductor layer and exposing a portion of the electrically conductive material that was deposited upon the portion of the second surface of the dielectric layer; and

depositing an electrically conductive material within the opening formed through the dielectric layer such that the electrically conductive material that was deposited within the opening through the semiconductor layer is electrically coupled to the electrically conductive material that is within the opening through the dielectric layer.

2. A method as set forth in claim 1 wherein the semiconductor layer is comprised of <

100>

silicon, and wherein the step of forming at least one opening through the semiconductor layer includes a step of etching the <

100>

silicon with KOH.

3. A method as set forth in claim 1 wherein the step of forming at least one opening through the semiconductor layer includes the initial steps of:

forming a dielectric layer upon the second surface of the semiconductor layer; and

opening an aperture through the dielectric layer, the aperture having an area that is a function of the thickness of the semiconductor layer.

4. A method as set forth in claim 1 wherein the semiconductor layer is comprised of <

100>

silicon that has a thickness in the range of approximately 10 micrometers to approximately 50 micrometers, and wherein the step of forming at least one opening through the semiconductor layer includes the steps of;

forming an oxide layer upon the second surface of the <

100>

silicon layer;

opening an aperture through the oxide layer, the aperture having a diameter that is at least approximately twice the thickness of the <

100>

silicon layer; and

etching the <

100>

silicon with KOH through the aperture.

5. A method as set forth in claim 2 wherein the slope is approximately equal to 54.7 degrees.