Reliable thin film resistors for integrated circuit applications

• US 5,323,138 A
• Filed: 09/04/1992
• Issued: 06/21/1994
• Est. Priority Date: 09/04/1992
• Status: Expired due to Fees

• Current Assignee: TRW Limited (Zeppelin - Stiftung der Stadt Friedrichshafen)
• Original Assignee: TRW Limited (Zeppelin - Stiftung der Stadt Friedrichshafen)
• Inventors: Streit, Dwight C., Yamada, Frank M., Oki, Aaron K., Umemoto, Donald K.
• Primary Examiner(s): Lateef, Marvin M.
• Application Number:
  US07/940,556
• Time in Patent Office: 655 Days
• Field of Search: 338/195, 338/309, 338/306, 338/307, 338/308, 338/314
• US Class Current: 338/307
• CPC Class Codes: H01C 7/006 Thin film resistors

Abstract

A thin film resistor with an insulating layer disposed between a substrate material and a resistor material is disclosed. Also, disclosed is a technique for fabricating this thin film resistor. In accordance with the preferred embodiment, the thin film resistor employs an insulating layer of silicon nitride with a thickness of 2000 Å. The insulating layer prevents the resistor layer from diffusing into the substrate material which, in turn, significantly reduces variations in the resistor value during accelerated life testing. Compared to thin film resistors with a resistor layer evaporated directly upon a substrate material, reliability is increased from a few hundred hours up to thousands of hours. Also, the maximum current handling capability is increased by greater than one order of magnitude, which results in a thin film resistor which requires less surface area of a wafer.

Claims

1. A thin film resistor for an integrated circuit comprising:

substrate means having a top surface;

insulating layer means formed on the top surface of said substrate means, said insulating layer means having a top surface;

resistor layer means formed on and in contact with the top surface of said insulating layer means opposite to the substrate means; and

contact means for making electrical contact with said resistor layer means, whereby said insulating layer means between said substrate means and said resistor layer means prevents diffusion of said resistor layer means into said substrate means.

2. The thin film resistor of claim 1 further comprising a passivation layer means formed on top of said resistor layer means, whereby said passivation layer means passivates said resistor layer means.

3. The thin film resistor of claim 2 wherein said substrate means is composed of gallium arsenide.

4. The thin film resistor of claim 1 wherein said insulating layer means is composed of silicon nitride.

5. The thin film resistor of claim 1 wherein said resistor layer is composed of nichrome.

6. The thin film resistor of claim 1 wherein said insulating layer means is about 2000 angstroms thick.

7. The thin film resistor of claim 1 wherein said resistor layer means is about 100 angstroms thick.

8. An integrated circuit comprising:

integrated circuit substrate means having a top surface;

insulating layer means formed on the top surface of said integrated circuit substrate means, said insulating layer means having a top surface;

resistor layer means formed on and in contact with the top surface of said insulating layer means opposite to the substrate means; and

contact means for making electrical contact with said resistor layer means, whereby said insulating layer means between said integrated circuit substrate means and said resistor layer means prevents diffusion of said resistor layer means into said integrated circuit substrate means.

9. The integrated circuit of claim 8 further comprising a passivation layer means formed on top of said resistor layer means, whereby said passivation layer means passivates said resistor layer means.

10. The integrated circuit of claim 8 wherein said substrate means is a gallium arsenide wafer.

11. The integrated circuit of claim 8 wherein said insulating layer means is composed of silicon nitride.

12. The integrated circuit of claim 8 wherein said resistor layer means is composed of nichrome.

13. The integrated circuit of claim 8 wherein said insulating layer means is about 2000 angstroms thick.

14. The integrated circuit of claim 8 wherein said resistor layer means is about 100 angstroms thick.

15. An integrated circuit comprising:

gallium arsenide integrated circuit substrate means having a top surface;

insulating layer means composed of silicon nitride and formed on said integrated circuit substrate means top surface, said insulating means having a top surface;

resistor layer means composed of nichrome and formed on top of said insulating layer opposite to the substrate means and in contact with the top surface of the insulating means;

passivation layer means composed of silicon nitride and formed on top of said resistor layers means, whereby said passivation layer means passivates said resistor layer means; and

contact means for making electrical contact with said resistor layer means, whereby said insulating layer means between said integrated circuit substrate means and said resistor layer means prevents diffusion of said resistor layer means into said integrated circuit substrate means.

16. A method of producing a thin film resistor comprising the steps of:

providing a substrate wafer having a substantially flat top surface;

forming an insulating layer means on top of said flat top surface of said substrate wafer, said insulating layer means having a top surface;

forming a resistor layer means on top of said insulating layer means opposite to the substrate means an in contact with the top surface of the insulating means, whereby said insulating layer means prevents said resistor layer means from diffusing into said substrate wafer; and

forming a contact means for making electrical contact with said resistor layer means.

17. The method of claim 16 wherein said step of forming said insulating layer means comprises the step of depositing silicon nitride onto said flat top surface of said substrate wafer.

18. The method of claim 17 wherein said step of forming said resistor layer means comprises the step of evaporating nichrome on top of said insulating layer means.

19. The method of claim 18 wherein said step of forming said contact means comprises the steps of:

depositing a first photoresist on said resistor layer means and said insulating layer means;

selectively developing said first photoresist into desirable geometric patterns by a photolithography process to form a desirable contact means profile pattern;

evaporating a metal on top of said first photoresist and said thin film resistor; and

stripping said first photoresist and said metal evaporated on top of said first photoresist.

20. The method of claim 16 further comprising the steps of:

depositing a second photoresist on said passivation layer means;

selectively developing said second photoresist into desirable geometric patterns by a photolithography process such that areas of said passivation layer means overlaying said contact means are not covered by said second photoresist;

etching said passivation layer means not covered by said second photoresist; and

stripping said second photoresist.