Method of forming a semiconductor structure having an air region

• US 5,324,683 A
• Filed: 06/02/1993
• Issued: 06/28/1994
• Est. Priority Date: 06/02/1993
• Status: Expired due to Fees

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Maniar, Papu, Ajuria, Sergio A., Witek, Keith E., Fitch, Jon T., Moazzami, Reza, Gelatos, Jerry
• Primary Examiner(s): Kunemund, Robert
• Assistant Examiner(s): EVERHART, CARIDAD
• Application Number:
  US08/070,613
• Time in Patent Office: 391 Days
• Field of Search: 437/65, 437/927, 437/249, 437/241, 437/238, 437/235, 148/DIG. 73
• US Class Current: 438/422
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 23/4821 Bridge structure with air gap
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 148/073 Hollow body

Abstract

A method for forming an air region or an air bridge overlying a base layer (12). Air regions (20a, 20b, 28a, and 48) are formed overlying the base layer (12) to provide for improved dielectric isolation of adjacent conductive layers, provide air-isolated conductive interconnects, and/or form many other microstructures or microdevices. The air regions (20a, 20b, 28a, and 48) are formed by either selectively removing a sacrificial spacer (16a and 16b) or by selectively removing a sacrificial layer (28, 40). The air regions (20a, 20b, 28a, and 48) are sealed, enclosed, or isolated by either a selective growth process or by a non-conformal deposition technique. The air regions (20a, 20b, 28a, and 48) may be formed under any pressure, gas concentration, or processing condition (i.e. temperature, etc.). The air regions (20a, 20b, 28a, and 48) may be formed at any level within an integrated circuit.

Claims

1. A method for forming a semiconductor device having an air region, the method comprising the steps of:

providing a base layer of material;

forming a first conductive element overlying the base layer, the first conductive element having a sidewall;

forming a second conductive element overlying the base layer, the second conductive element having a sidewall and being physically separated from the first conductive element by an opening;

forming a first sidewall spacer having a top portion, the first sidewall spacer being laterally adjacent the sidewall of the first conductive element;

forming a second sidewall spacer having a top portion, the second sidewall spacer being laterally adjacent the sidewall of the second conductive element;

forming a plug layer within the opening between the first conductive element and the second conductive element, the plug layer exposing the top portion of the first sidewall spacer and the top portion of the second sidewall spacer; and

removing both the first and second sidewall spacers to form the air region between the first conductive element and the second conductive element.

2. The method of claim 1 further comprising the step of:

depositing a non-conformal dielectric layer overlying the air region to completely encapsulate the air region.

3. The method of claim 1 wherein the step of forming the plug layer comprises the steps of:

forming a layer of plug material within the opening between the first conductive element and the second conductive element; and

planarizing the layer of plug material to form the plug layer within the opening between the first conductive element and the second conductive element by using a process selected from a group consisting of;

chemical mechanical processing (CMP), and resist etch-back (REB).

4. The method of claim 1 wherein the step of forming the first sidewall spacer comprises:

forming the first sidewall spacer from a material which is water soluble.

5. The method of claim 1 wherein the step of forming the first sidewall spacer comprises:

forming the first sidewall spacer from a material selected from a group consisting of;

titanium nitride, silicon nitride, a nitrided material, borophosphosilicate glass (BPSG), borosilicate glass (BSG), boronitride (BN), boro-oxynitride (BNO), titanium oxide, germanium silicon, germanium oxide, ruthenium oxide, polyimide, an organic material, calcium flouride, barium flouride, strontium flouride, a flourided material, a polymeric material, and a refractory metal.

6. The method of claim 1 wherein the step of providing a base layer of material comprises:

providing the base layer of material as a material selected from the group consisting of;

a silicon substrate, a dielectric layer, and an oxide.

7. The method of claim 1 wherein the step of removing both the first and second sidewall spacers to form an air region comprises:

exposing the air region to a vacuum environment to alter a pressure within the air region to a pressure other than atmospheric pressure.

8. The method of claim 1 wherein the step of removing both the first and second sidewall spacers to form an air region comprises:

exposing the air region to a gas wherein said gas alters a gas composition of the air region, the gas composition being different from an atmospheric gas composition.

9. A method for forming a semiconductor device, the method comprising the steps of:

providing a base layer;

forming a first layer of material which is resistant to growth overlying the base layer;

forming a growth layer overlying the first layer of material;

forming a second layer of material which is resistant to growth overlying the growth layer;

etching an opening through the first layer, the growth layer, and the second layer, the opening defining a sidewall of the growth layer; and

selectively growing the sidewall of the growth layer to form a grown region which closes off a portion of the opening and forms an enclosed air region within the opening.

10. The method of claim 9 wherein the step of forming the growth layer comprises:

lithographically patterning and etching the growth layer to form patterned growth layer regions overlying the base layer.

11. The method of claim 9 wherein the step of forming the growth layer comprises:

forming the growth layer from a material selected from a group consisting of;

silicon, polysilicon, amorphous silicon, germanium, titanium nitride, germanium silicon, a metal, a conductive material.

12. The method of claim 9 further comprising a step of:

forming a sacrificial material between the base layer and the first layer of material.

13. The method of claim 12 further comprising a step of:

removing at least a portion of the sacrificial material to form a portion of the air region.

14. The method of claim 12 wherein the step of forming the sacrificial material comprises:

forming the sacrificial material from a material selected from a group consisting of;

titanium nitride, silicon nitride, a nitrided material, borophosphosilicate glass (BPSG), borosilicate glass (BSG), boronitride (BN), boro-oxynitride (BNO), titanium oxide, germanium silicon, germanium oxide, ruthenium oxide, polyimide, an organic material, calcium fluoride, barium flouride, strontium flouride, a flourided material, a polymeric material, and a refractory metal.

15. The method of claim 12 wherein the step of forming the sacrificial material comprises:

forming the sacrificial material as a material which is water-soluble.

16. The method of claim 9 further comprising the step of:

forming the air region having a pressure which is other than atmospheric pressure.

17. The method of claim 9 further comprising the step of:

trapping a gas within the air region wherein the gas is other than oxygen.

18. The method of claim 9 further comprising the steps of:

forming a first conductive region between the base layer and the first layer of material; and

forming a second conductive region between the base layer and the first layer of material, the second conductive region being physically separated from the first conductive region by the air region.

19. A method for forming a semiconductor device having an air isolation region, the method comprising the steps of:

providing a base layer;

forming a first conductive region overlying the base layer;

forming a second conductive layer overlying the base layer and physically separated from the first conductive region by a separation region;

forming a sacrificial layer of material within the separation region;

forming a first dielectric layer overlying the first conductive region, the second conductive region, and the sacrificial layer;

forming a seed layer overlying the first dielectric layer;

forming an opening through the first dielectric layer and the seed layer to expose a portion of the sacrificial layer, the opening forming a sidewall of the seed layer;

removing the sacrificial layer of material to form the air isolation region between the first conductive region and the second conductive region; and

growing material from the sidewall of the seed layer to close a portion of the opening and isolate the air isolation region.

20. The method of claim 19 wherein the step of forming the sacrificial material of material comprises:

forming the sacrificial material of material from a material selected from a group consisting of;

titanium nitride, silicon nitride, a nitrided material, borophosphosilicate glass (BPSG), borosilicate glass (BSG), boronitride (BN), boro-oxynitride (BNO), titanium oxide, germanium silicon, germanium oxide, ruthenium oxide, polyimide, an organic material, calcium flouride, barium flouride, strontium flouride, a flourided material, a polymeric material, and a refractory metal.

21. The method of claim 19 wherein the step of forming the sacrificial material of material comprises:

forming the sacrificial material as a material which is water-soluble.

22. The method of claim 19 wherein the step of growing material from the sidewall of the seed layer to close a portion of the opening and isolate the air isolation region further comprises:

exposing the air isolation region to a vacuum environment which has a pressure other than atmospheric pressure, the vacuum environment forming a vacuum within the air isolation region when the air isolation region is isolated by the step of growing.

23. The method of claim 22 wherein the step of exposing the air isolation region to a vacuum environment comprises:

exposing the air isolation region to the vacuum environment which has a pressure less than one Torr, the vacuum environment forming a vacuum within the air isolation region which is less than one Torr and decreases a dielectric constant of the air isolation region.

24. The method of claim 19 wherein the step of growing material from the sidewall of the seed layer to close a portion of the opening and isolate the air isolation region further comprises:

exposing the air isolation region to an ambient gas, the ambient gas remaining within the air isolation region when the air isolation region is isolated by the step of growing.

25. The method of claim 19 further comprising the step of:

forming a second dielectric layer overlying the seed layer.

26. A method for forming a semiconductor device having an air region, the method comprising the steps of:

providing a base layer;

forming a layer of material overlying the base layer;

forming a seed layer overlying the layer of material;

removing a portion of the layer of material and a portion of the seed layer to form a patterned layer of material from the layer of material, the patterned layer of material having a sidewall;

forming a sidewall spacer adjacent the sidewall of the patterned layer of material;

forming an opening having a radius through the seed layer to expose a portion of the patterned layer of material;

removing the patterned layer of material to form said air region; and

growing material onto the seed layer to reduce the radius of the opening.

27. The method of claim 26 wherein the step of forming a layer of material comprises:

forming the layer of material from a material which is water-soluble.

28. The method of claim 26 wherein the step of forming a layer of material comprises:

forming the layer of material from a material selected from a group consisting of;

titanium nitride, silicon nitride, a nitrided material, borophosphosilicate glass (BPSG), borosilicate glass (BSG), boronitride (BN), boro-oxynitride (BNO), titanium oxide, germanium silicon, germanium oxide, ruthenium oxide, polyimide, an organic material, calcium flouride, barium flouride, strontium flouride, a flourided material, a polymeric material, and a refractory metal.

29. The method of claim 26 further comprising the step of:

exposing the air region to a vacuum environment to alter a first pressure within the air region to a second pressure other than atmospheric pressure after removing the patterned layer of material.

30. The method of claim 26 wherein the step of removing the patterned layer of material comprises:

exposing the air region to a gas wherein said gas alters a gas composition of the air region, the gas composition being different from an atmospheric gas composition.

31. The method of claim 26 wherein the step of growing material onto the seed layer to reduce the radius of the opening comprises:

completely closing a portion of the opening to isolate the air region.

32. A method for forming a semiconductor structure having an intentional void, the method comprising the steps of:

providing a base layer;

forming a first layer of material overlying the base layer;

forming a second layer of material overlying the base layer and laterally separated from the first layer of material;

forming a sacrificial layer of material between the first and second layers of material;

forming a dielectric layer overlying the first layer of material, the second layer of material, and the sacrificial layer of material, the dielectric layer having an opening which exposes a portion of the sacrificial layer of material;

forming a seed spacer within the opening;

removing the sacrificial layer of material to form said intentional void between the first and second layers of material; and

growing material from the seed spacer to close the opening.

33. The method of claim 32 wherein the step of forming a sacrificial layer of material between the first and second layers of material comprises:

forming the sacrificial layer of material from a material which is water-soluble.

34. The method of claim 32 wherein the step of forming a sacrificial layer of material between the first and second layers of material comprises:

forming the sacrificial layer of material from a material selected from a group consisting of;

titanium nitride, silicon nitride, a nitrided material, borophosphosilicate glass (BPSG), borosilicate glass (BSG), boronitride (BN), boro-oxynitride (BNO), titanium oxide, germanium silicon, germanium oxide, ruthenium oxide, polyimide, an organic material, calcium flouride, barium flouride, strontium flouride, a flourided material, a polymeric material, and a refractory metal.

35. A method for forming a semiconductor structure having an intentional void, the method comprising the steps of:

providing a base layer having a surface;

forming a patterned plug region overlying the base layer, the patterned plug region having a sidewall which is substantially perpendicular to the surface of the base layer;

forming a sidewall spacer laterally adjacent the sidewall of the plug region;

forming a layer of material overlying the sidewall spacer and the patterned plug region;

planarizing the layer of material to expose a portion of the sidewall spacer;

removing the spacer to form said intentional void; and

forming a dielectric layer overlying the intentional void to encapsulate the intentional void.

36. The method of claim 35 further comprising:

forming a polish stop layer overlying the patterned plug region.