Multi-layer type semiconductor device with semiconductor element layers stacked in opposite direction and manufacturing method thereof
First Claim
1. A multi-layer type semiconductor device, comprising:
- a substrate having a main surface;
a first semiconductor element layer formed on said main surface of said substrate and including a first semiconductor element having an active layer portion, a gate portion and a gate insulating film portion vertically therebetween;
an insulating layer formed on the active layer portion of said first semiconductor layer; and
a second semiconductor element layer formed on said insulating layer and including a second semiconductor element having an active layer portion adjacent said insulating layer, a gate portion and a gate insulating film portion therebetween;
the first and second elements being oriented in vertical alignment to each other and back-to-back on said first and second semiconductor element layers.
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Accused Products
Abstract
A multi-layer type semiconductor device is disclosed, in which a plurality of semiconductor layers are formed in vertically opposite directions. The multi-layer type semiconductor device is obtained by forming a first semiconductor layer, an insulating layer and a second semiconductor layer in the mentioned order on a main surface of a first substrate, forming a semiconductor device by using the second semiconductor layer as a base, with an exposed surface thereof directed upward, forming an insulating film on the semiconductor device, attaching a second substrate to the insulating film, thinning the first substrate to expose the first semiconductor layer, and forming a further semiconductor device by using the first semiconductor layer as a base, with an exposed surface of the first semiconductor layer directed upward. A single- chip type image forming system or sensing system may be provided by employing, as the semiconductor devices, a sensing device such as a photosensor, a pressure sensor or the like, a processing circuit for processing a signal received from the sensor, and a display device for displaying results of the processing. A large number of pads may be provided by arranging the pads on opposite surfaces of a chip.
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Citations
8 Claims
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1. A multi-layer type semiconductor device, comprising:
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a substrate having a main surface; a first semiconductor element layer formed on said main surface of said substrate and including a first semiconductor element having an active layer portion, a gate portion and a gate insulating film portion vertically therebetween; an insulating layer formed on the active layer portion of said first semiconductor layer; and a second semiconductor element layer formed on said insulating layer and including a second semiconductor element having an active layer portion adjacent said insulating layer, a gate portion and a gate insulating film portion therebetween; the first and second elements being oriented in vertical alignment to each other and back-to-back on said first and second semiconductor element layers.
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2. A multi-layer semiconductor device, comprising:
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a substrate having a main surface; a first semiconductor element layer formed on said main surface of said substrate and including a first semiconductor element having an active layer portion, a gate portion and a gate insulating film portion vertically therebetween, and a first field oxide layer for interelement isolation; an insulating layer formed on the active layer portion of said first semiconductor layer; and a second semiconductor element layer formed on said insulating layer and including a second semiconductor element having an active layer portion adjacent said insulating layer, a gate portion and a gate insulating film portion therebetween, and a second field oxide layer for element isolation; the first and second elements being oriented in vertical alignment to each other and back-to-back on said first and second semiconductor element elements. - View Dependent Claims (3, 4)
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5. A multi-layer type semiconductor device, comprising:
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a substrate having a main surface; a first semiconductor element layer formed on said main surface of said substrate and including a first semiconductor element having an active layer portion, a gate portion and a gate insulating film portion vertically therebetween; an insulating layer formed on the active layer portion of said first semiconductor layer; and a second semiconductor element layer formed on said insulating layer and including a second semiconductor element having an active layer portion adjacent said insulating layer, a gate portion and a gate insulating film portion therebetween; the first and second elements being located in regions surrounded by field oxide layers for element isolation formed in contact with said insulating layer and being oriented back-to-back on said first and second semiconductor element layers, each of said regions including one or more of the semiconductor elements.
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6. A multi-layer type semiconductor device, comprising:
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a substrate having a main surface; a first semiconductor element layer formed on said main surface of said substrate and including a first semiconductor element having an active layer portion, a gate portion and a gate insulating film portion vertically therebetween; an insulating layer formed on the active layer portion of said first semiconductor layer; and a second semiconductor element layer formed on said insulating layer and including a second semiconductor element having an active layer portion adjacent said insulating layer, a gate portion and a gate insulating film portion therebetween, a field oxide layer for element isolation and an interlayer insulation film; said second semiconductor element being isolated by said field oxide layer for element isolation and said interlayer insulation film; the first and second elements being oriented back-to-back on said first and second semiconductor element layers. - View Dependent Claims (7)
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8. A multi-layer type semiconductor device, comprising:
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a substrate having a main surface; a first semiconductor element layer formed on said main surface of said substrate and including a first semiconductor element having an active layer portion, a gate portion and a gate insulating film portion vertically therebetween; an insulating layer formed on the active layer portion of said first semiconductor layer; and a second semiconductor element layer formed on said insulating layer and including a second semiconductor element having an active layer portion adjacent said insulating layer, a gate portion and a gate insulating film portion therebetween; the first and second elements being oriented back-to-back on said first and second semiconductor element layers; the thickness of each of the semiconductor element layers being less than 1 μ
m.
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Specification