Data transfer control device using direct memory access
First Claim
1. A data transfer control device to control, using direct memory access, data transfer between a memory having a plurality of transfer areas for storing data transferred from a CPU and a peripheral comprising:
- address storing means for storing the address of data in a transfer area of said memory,means for updating the address of said address storing means each time a data transfer is executed,data number storing means for storing the number of transfer data to be transferred;
means for updating he value of said data number storing means each time a data transfer is executed, andexecution control means for executing transfer of data in a first transfer area addressed by said address storing means according to a data transfer request,said execution control means further comprising a first authorization means for storing the information indicating whether to authorize or inhibit the execution of data transfer upon a data transfer request,next transfer area authorization means for storing in advance the information indicating whether to execute the data transfer of a next transfer area, andloading means for loading information stored in said next transfer area authorization means to said first authorization means when the value at said data number storing means becomes a predetermined value, so as to execute or inhibit the data transfer according to the information stored at said first authorization means.
2 Assignments
0 Petitions
Accused Products
Abstract
When DMA transfer for a DMA transfer area is completed, DMA transfer for the next area may be continuously executed or stopped. In addition to this, if there is a need to urgently stop DMA transfer being executed, DMA transfer can be immediately stopped without waiting for the end of DMA transfer currently executed. For continuous DMA transfer for a plurality of DMA transfer areas, the device may be provided with an authorization bit to authorize DMA transfer operation and a next area authorization bit to authorize DMA transfer for the next area and the contents in the next area authorization bit are set to the DMA authorization bit when the terminal counter which counts the number of DMA transfer data reaches the predetermined value due to decrement. Depending on the contents in the DMA authorization bit, DMA transfer may be continued or stopped when the next DMA transfer request is generated. In addition, DMA transfer may be stopped in emergency by directly setting the applicable value at the DMA authorization bit.
55 Citations
6 Claims
-
1. A data transfer control device to control, using direct memory access, data transfer between a memory having a plurality of transfer areas for storing data transferred from a CPU and a peripheral comprising:
-
address storing means for storing the address of data in a transfer area of said memory, means for updating the address of said address storing means each time a data transfer is executed, data number storing means for storing the number of transfer data to be transferred; means for updating he value of said data number storing means each time a data transfer is executed, and execution control means for executing transfer of data in a first transfer area addressed by said address storing means according to a data transfer request, said execution control means further comprising a first authorization means for storing the information indicating whether to authorize or inhibit the execution of data transfer upon a data transfer request, next transfer area authorization means for storing in advance the information indicating whether to execute the data transfer of a next transfer area, and loading means for loading information stored in said next transfer area authorization means to said first authorization means when the value at said data number storing means becomes a predetermined value, so as to execute or inhibit the data transfer according to the information stored at said first authorization means. - View Dependent Claims (2, 3, 4, 5, 6)
-
Specification