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Translation lookaside buffer shutdown scheme

  • US 5,325,507 A
  • Filed: 02/18/1993
  • Issued: 06/28/1994
  • Est. Priority Date: 05/02/1986
  • Status: Expired due to Term
First Claim
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1. A content addressable memory apparatus comprising:

  • a plurality of tag registers;

    a plurality of data registers, each data register having an output enable for enabling contents of the data register onto an output bus;

    means for loading information into a first one of the tag registers independently of contents of a second one of the tag registers;

    a plurality of comparators, each of the comparators corresponding with a respective one of the tag registers and generating a match signal indicative of whether contents of the respective one of the tag registers matches an incoming tag signal;

    first detection means for activating a multiple match signal when at least a given number of the comparators generate match signals indicating contents of respective ones of the tag registers match the incoming tag signal, the given number being greater than one; and

    means for coupling each of the match signals to a respective one of the output enables, the means for coupling to all of the output enables being inhibited if the multiple match signal is active.

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