Electronic ballast for gaseous discharge lamp operation

• US 5,331,253 A
• Filed: 08/24/1992
• Issued: 07/19/1994
• Est. Priority Date: 08/24/1992
• Status: Expired due to Fees

• Current Assignee: Prescolite-Moldcast Lighting Company
• Original Assignee: U.S.I. Lighting, Inc.
• Inventors: Counts, Richard C.
• Primary Examiner(s): Pascal, Robert J.
• Assistant Examiner(s): Ratliff, Reginald A.
• Application Number:
  US07/934,411
• Time in Patent Office: 694 Days
• Field of Search: 315/209 R, 315/219, 315/307, 315/291, 315/DIG. 5, 315/DIG. 7
• US Class Current: 315/209.00R
• CPC Class Codes: H02M 7/53803 with automatic control of output voltage or current
• CPC Class Codes: H03L 7/06 using a reference signal applied to a frequency- or phase-locked loop
• CPC Class Codes: H05B 41/2828 using control circuits for the switching elements H05B41/2827 takes precedence
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y10S 315/05 Starting and operating circuit for fluorescent lamp
• CPC Class Codes: Y10S 315/07 Starting and control circuits for gas discharge lamp using transistors

Abstract

An embodiment of the present invention is a lighting system comprising a full-wave bridge, a filter capacitor, a control logic that drives a pair of output transistors and an output network that includes an output transformer that powers a pair of fluorescent lamps. The output transformer has a natural resonant frequency that will produce maximum power transfer to the lamps if the transistors are switched by the control logic at a rate near the natural resonant frequency. Precise frequency control within the control logic maintain consistent levels of output current through the lamps by phase lock loop (PLL) synchronizing its output switching frequency to the sixty Hz commercial line frequency, as sampled through a resistor and a digital integrator that prevents false triggering.

Claims

1. A gaseous discharge lamp system, comprising:

an output transformer having a natural resonant frequency Fn and a primary winding with a capacitor input and at least one secondary winding for direct connection to a gaseous discharge lamp and its filaments;

a pair of output transistors connected in series across an input for a direct current source of power and having at their common junction a connection to said capacitor input of said primary winding of the output transformer such that said common junction may be alternatively switched by the output transistors between each polarity of said direct current source at a plurality of rates that includes a first switching rate to start said gaseous discharge lamps and a second switching rate to operate said gaseous discharge lamps;

oscillator means connected to the pair of output transistors for controlling the switching rate of power applied to the output transformer relative to said frequency Fn; and

synchronizing means connected to control the oscillator means and having an input for an alternating current source for phase locking the frequency output of the oscillator means to either said first switching rate to startup said gaseous discharge lamps or said second switching rate to operate said gaseous discharge lamps, wherein minor variations in the values of individual circuit components do not prevent operation of the oscillator at said switching rates.

2. The system of claim 1, wherein:

the synchronizing means comprises a digital integrator for connection to said alternating current source and for sampling said alternating current source such that false triggering is avoided.

3. The system of claim 1, wherein:

the oscillator means comprises a voltage controlled oscillator (VCO) with a phase locked loop circuit.

4. An electronic ballast for gaseous discharge lamp operation, comprising:

a digital integrator connected to sample a synchronizing (SYNC) signal derived from an alternating current power source input and having an output that provides a reference frequency signal;

a phase detector connected to said output of the digital integrator and having a feedback frequency input for comparing the frequency of a feedback signal to said reference frequency signal and having a comparison output;

a phase locked loop (PLL) integrator connected to said comparison output of the phase detector and having a control output for adjusting an analog output control voltage in response to an output of the phase detector;

a voltage controlled oscillator (VCO) having an output connected to provide in response to said control output a plurality of frequencies relative to a natural resonant frequency of a transformer driven by the VCO and connected to at least one gaseous discharge lamp which frequencies include a first frequency for operating a filament within said gaseous discharge lamp for startup and a second frequency for igniting said gaseous discharge lamp and for maintaining lamp luminescence; and

a digital divider connected with an input to the VCO and an output to the phase detector for dividing the VCO output frequency such that at least said first and second frequencies may be produced by the VCO.

5. The ballast of claim 4, wherein the digital integrator comprises:

clipping means connected to said alternating current power source input for limiting said SYNC signal such that the resulting signal is compatible with digital logic;

hysteresis means connected to the clipping means for buffering said SYNC signal to digital logic;

cascaded flip-flop means connected to the hysteresis means for sampling said SYNC signal at a minimum of five different points in time for preventing false triggering of said reference frequency.

6. The ballast of claim 4, wherein the digital divider comprises:

counting means connected to said VCO output for dividing said VCO output frequency by 512; and

sampling clock means connected to said VCO output for dividing said VCO output frequency such that at least four samples of said SYNC signal obtained by the digital integrator each period of said alternating current power source.