Mailing machine including multiple channel pulse width modulated signal circuit

• US 5,331,539 A
• Filed: 12/01/1992
• Issued: 07/19/1994
• Est. Priority Date: 12/01/1992
• Status: Expired due to Fees

• Current Assignee: Pitney Bowes Incorporated (Böwe Systec AG)
• Original Assignee: Pitney Bowes Incorporated (Böwe Systec AG)
• Inventors: Schoonmaker, Richard P., Pfeifer, Thomas M.
• Primary Examiner(s): Smith, Jerry
• Assistant Examiner(s): Garland, Steven R.
• Application Number:
  US07/983,912
• Time in Patent Office: 595 Days
• Field of Search: 364/140, 364/464.02, 364/464.03, 318/34-39, 318/46, 318/49, 318/51, 318/53, 318/59, 318/66, 318/67, 318/112, 318/599
• US Class Current: 700/11
• CPC Class Codes: H02M 1/008 Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators
• CPC Class Codes: H02M 3/28 using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
• CPC Class Codes: H02P 5/68 controlling two or more dc dynamo-electric motors H02P5/46, H02P5/60 take precedence

Abstract

Apparatus for generating a plurality of pulse width modulated signals for separately driving a plurality of electrical loads, comprising, a microprocessor, a plurality of comparator means, each of the comparator structure including first and second input terminals and an output terminal, digital to analog converter structure connected to the microprocessor for control thereby, the converter structure including a plurality of output terminals respectively connected to a different comparator structure first terminal for providing separate control signals thereto, structure for generating a reference voltage signal having a variable amplitude, the signal generating structure connected to each of the comparator structure second terminals for providing the reference voltage signal thereto, a plurality of power amplifiers, a plurality of electrical loads respectively connected to a different comparator structure output terminal via a different power amplifier for receiving therefrom an amplified comparator structure output signal, the microprocessor programmed for selectively addressing the converter structure output terminals, the microprocessor programmed for generating said separate control signals, and each of the comparator structure responsive to a different separate control signal and said variable reference voltage signal for modulating the pulse width of a comparator structure output signal to drive the power amplifier and thus the electrical load connected thereto.

Claims

1. Apparatus for generating a plurality of pulse width modulated signals for separately driving a plurality of electrical loads, comprising:

a. a microprocessor;

b. a plurality of comparator means, each of the comparator means including first and second input terminals and an output terminal;

c. digital to analog converter means connected to the microprocessor for control thereby, the converter means including a plurality of output terminals respectively connected to a different comparator means first terminal for providing separate control signals thereto;

d. means for generating a reference voltage signal having a variable amplitude, the signal generating means connected to each of the comparator means second terminals for providing the reference voltage signal thereto;

e. a plurality of power amplifiers;

f. a plurality of electrical loads respectively connected to a different comparator means output terminal via a different power amplifier for receiving therefrom an amplified comparator means output signal;

g. the microprocessor programmed for selectively addressing the converter means output terminals, the microprocessor programmed for generating said separate control signals, and each of the comparator means responsive to a different separate control signal and said variable reference voltage signal for modulating the pulse width of a comparator means output signal to drive the power amplifier and thus the electrical load connected thereto.

2. The apparatus according to claim 1, wherein the variable reference voltage signal is a saw tooth-shaped signal.

3. The apparatus according to claim 2, wherein the saw tooth-shaped signal has a predetermined low voltage level which is greater than zero volts.

4. The apparatus according to claim 2, wherein the saw tooth-shaped signal has a predetermined high voltage level which is less than a maximum available voltage level.

5. The apparatus according to claim 1, wherein the variable reference voltage signal is a ramp-shaped signal.

6. The apparatus according to claim 5, wherein the ramp-shaped signal has a predetermined low voltage level which is greater than zero volts.

7. The apparatus according to claim 5, wherein the ramp-shaped signal has a predetermined high voltage level which is less than a maximum available voltage level.

8. The apparatus according to claim 1, wherein the converter means includes four output terminals, and the program for selectively addressing the converter means output terminals includes programming for utilizing two bits of a ten bit word for addressing each of the four converter means output terminals, and the programming for selectively generating said separate control signals including programming for utilizing the remaining byte of the ten bit word for generating each of said separate control signals.

9. The apparatus according to claim 1, wherein one of the electrical loads is a motor.

10. The apparatus according to claim 1, wherein one of the electrical loads is a solenoid.

11. In a mailing machine base including a solenoid and a motor, apparatus for generating a plurality of pulse width modulated signals for separately driving the solenoid and motor, the apparatus comprising:

a. a microprocessor;

b. a plurality of comparator means, each of the comparator means including first and second input terminals and an output terminal;

c. digital to analog converter means connected to the microprocessor for control thereby, the converter means including a plurality of output terminals respectively connected to a different comparator means first terminal for providing separate control signals thereto;

d. means for generating a reference voltage signal having a variable amplitude, the signal generating means connected to each of the comparator means second terminals for providing the reference voltage signal thereto;

e. a plurality of power amplifiers;

f. the solenoid and motor respectively connected to a different comparator means output terminal via a different power amplifier for receiving therefrom an amplified comparator means output signal;

g. the microprocessor programmed for selectively addressing the converter means output terminals, the microprocessor programmed for generating said separate control signals, and each of the comparator means responsive to a different separate control signal and said variable reference voltage signal for modulating the pulse width of each of the comparator means output signals to drive the power amplifiers and thus the solenoid and motor.

12. The apparatus according to claim 11, wherein the variable reference voltage signal is a saw tooth-shaped signal.

13. The apparatus according to claim 12, wherein the saw tooth-shaped signal has a predetermined low voltage level which is greater than zero volts.

14. The apparatus according to claim 12, wherein the saw tooth-shaped signal has a predetermined high voltage level which is less than a maximum available voltage level.

15. The apparatus according to claim 11, wherein the variable reference voltage signal is a ramp-shaped signal.

16. The apparatus according to claim 15, wherein the ramp-shaped signal has a predetermined low voltage level which is greater than zero volts.

17. The apparatus according to claim 15, wherein the ramp-shaped signal has a predetermined high voltage level which is less than a maximum available voltage level.

18. The apparatus according to claim 11, wherein the converter means includes two output terminals, and the program for selectively addressing the converter means output terminals includes programming for utilizing two bits of a ten bit word for addressing each of the two converter means output terminals, and the programming for selectively generating said separate control signals including programming for utilizing the remaining byte of the ten bit word for generating each of said separate control signals.