Electronic computer system and processor element used with the computer system

• US 5,333,320 A
• Filed: 09/08/1992
• Issued: 07/26/1994
• Est. Priority Date: 01/09/1990
• Status: Expired due to Fees

• Current Assignee: Hajime Seki
• Original Assignee: Hajime Seki
• Inventors: Seki, Hajime
• Primary Examiner(s): Heckler, Thomas M.
• Application Number:
  US07/923,928
• Time in Patent Office: 686 Days
• Field of Search: 364/DIG. 1 MS File, 364/DIG. 2 MS File, 395/650, 395/325, 395/375, 395/800
• US Class Current: 713/100
• CPC Class Codes: G06F 15/17 using an input/output type connection, e.g. channel, I/O port
• CPC Class Codes: G06F 15/8015 One dimensional arrays, e.g. rings, linear arrays, buses
• CPC Class Codes: G06F 9/4494 data driven

Abstract

A data-driven electronic computer system and processor element used for the same system. The present data-driven computer system comprises a control processor, a plurality of processor elements, and a plurality of memory devices each of which is directly accessed by its corresponding processor element, wherein data transfers can be performed in packet transmission among all the processor elements. Each processor element has an operation control unit which performs arithmetic/logic operations in a data-driven manner, and a communication control unit which performs data transfers between the processor elements.

Claims

1. A data-driven electronic computer system comprising:

a control processor;

a packet switched network;

a plurality of processor elements connected to said control processor and said packet switched network, each processor element having an operation control unit for performing arithmetic/logic operations in a data-driven manner and a communication control unit for performing data transfers between said processor elements through said packet switched network in a data-driven manner; and

a plurality of memory devices having one-to-one correspondence with said processor elements, and each being connected to and being directly accessed only by its corresponding one of said processor elements,

whereby, when said control processor broadcasts a program statement arranged in reverse Polish notation, said program statement defining arithmetic/logic operations, each of said processor elements assigned to perform the arithmetic/logic operations defined by said program statement sets the operation control unit to perform said arithmetic/logic operations defined by said program statement in a data-driven manner;

whereas each of said processor elements which has direct access to a data corresponding to any operand variable in said program statement sets the communication control unit so that, when said data is obtained, said data will be transferred through said packet switched network to the processor element assigned to perform the arithmetic/logic operation by using said data.

2. A data-driven electronic computer system comprising:

a control processor;

a packet switched network;

a plurality of processor elements connected to said control processor and said packet switched network, each processor element having an operation control unit for performing arithmetic/logic operations in a data-driven manner and a communication control unit for performing data transfers between said processor elements through said packet switched network in a data-driven manner; and

a plurality of memory devices having one-to-one correspondence with said processor elements, and each being connected to and being directly accessed only by its corresponding one of said processor elements,

wherein, with a set of subsections defining a part of a job, and each being assigned to one of said processor elements and being stored in its corresponding one of said memory devices, when said control processor instructs a processor element of said processor elements to activate a subsection of said set of subsections assigned to said processor element, said processor element loads said subsection from its corresponding one of said memory devices and, by processing said subsection, said processor element sets itself to perform in a date-driven manner.

3. The data-driven electronic computer system according to claim 2, wherein, with a subsection and a pointer being stored in a memory device of said memory devices, said pointer indicating the area in which said subsection is stored, said control processor indicates the address holding said pointer in instructing the one of said processor elements which is directly connected to said memory device to activate said subsection.

4. The date-driven electronic computer system according to claim 2, wherein, for the purpose of activating a plurality of subsections at once, with a pointer being stored at the same address in each of said memory devices, said pointer indicating the storage area of a subsection of said plurality of subsections in the same memory device, said control processor indicates said address.

5. A processor element comprising:

a data memory having a plurality of cells each of which is constructed to hold a variable identifier and a variable data, said data memory having an associative function for comparing a variable identifier transmitted to said data memory with variable identifiers each of which is held in one of said cells of said data memory, and writing a variable data in each cell of said data memory holding the same variable identifier as said variable identifier transmitted to said data memory;

a stack memory having a plurality of cells each of which is constructed to hold an address of a cell of said data memory;

an instruction memory having a plurality of cells each of which is constructed to hold an operation code and at least three addresses of a cell of said data memory; and

an operation unit for performing an arithmetic/logic operation specified in one of said cells of said instruction memory when all of operand data required for said arithmetic/logic operation are prepared in said data memory, wherein

said processor element is set to perform arithmetic/logic operations defined by a program statement arranged in reverse Polish notation in a data-driven manner by carrying out one of the following procedures each time a program element which is a component of said program statement is conveyed to said processor element,

namely, for a program element which represents a variable identifier indicative of a result storage address in a memory device, writing said variable identifier indicative of said result storage address in an unoccupied cell of said data memory, and pushing the address of said cell of said data memory in which said variable identifier indicative of said result storage address is written onto said stack memory;

for a program element which represents a variable identifier of an operand, writing said variable identifier of said operand in an unoccupied cell of said data memory, and pushing the address of said cell of said data memory in which said variable identifier of said operand is written onto said stack memory;

for a program element which represents an immediate data, writing said immediate data in an unoccupied cell of said data memory, and pushing the address of said cell of said data memory in which said immediate data is written onto said stack memory;

for a program element which represents an operator to generate a result data, reserving an unoccupied cell of said data memory for said result data, popping addresses of a cell of said data memory, to the number of operands that said operator needs, from said stack memory, writing the code of said operator, said addresses popped from said stack memory and the address of said cell of said data memory reserved for said result data in an unoccupied cell of said instruction memory, and pushing said address of said cell of said data memory reserved for said result data onto said stack memory; and

for a program element which represents an operator to generate no result data, popping addresses of a cell of said data memory, to the number of operands that said operator needs, from said stack memory, and writing the code of said operator and said addresses popped from said stack memory in an unoccupied cell of said instruction memory.