Digital signal processing method and apparatus including a graphic template display
First Claim
1. Signal processing and display apparatus for monitoring repetitive signal pulses appearing in a stream of data, comprising:
- signal acquisition means for detecting and digitizing said repetitive signal pulse to form digitized signal pulse data;
buffer means for temporarily storing said digitized signal pulse data;
template memory means for storing template data corresponding to a template in the form of a mask of one data state having a window area therein of a second data state, the borders of the window area defining acceptable tolerance limits for certain characteristics of said repetitive signal pulses;
display memory means;
image formatting said bit mapping means for retrieving said template data from said template memory means and for extracting said digitized signal pulse data from said buffer means, for bit mapping said template data and said digitized signal pulse data into a predetermined pixel array format, and for causing the bit mapped template data and bit mapped digitized signal pulse data to be stored in said display memory means; and
display means for reading out the bit mapped template data and bit mapped digitized signal pulse data stored in said display memory means and for displaying the bit mapped template data and the bit mapped digitized signal pulse data in overlapping alignment to indicate the relationship between said repetitive signal pulses and said template.
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Abstract
A digital signal processing apparatus including a graphic template display including an input circuit for sampling, digitizing and storing successive samples of an input signal, a signal processor for scaling the sampled signal data, a buffer for storing the scaled signals, a copy memory for storing a copy of the scaled signal data, a template memory for storing template data, an image retrieval circuit for accessing and reading out the stored signal and template data, a data mapping circuit for reformatting the stored image data, a display memory for holding the reformatted image data for cyclical display, a memory access circuit for accessing and combining the reformatted image data and the display memory data, and for providing the timing necessary for presentation of the combined data, and display apparatus for displaying the combined data in an original format.
30 Citations
15 Claims
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1. Signal processing and display apparatus for monitoring repetitive signal pulses appearing in a stream of data, comprising:
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signal acquisition means for detecting and digitizing said repetitive signal pulse to form digitized signal pulse data; buffer means for temporarily storing said digitized signal pulse data; template memory means for storing template data corresponding to a template in the form of a mask of one data state having a window area therein of a second data state, the borders of the window area defining acceptable tolerance limits for certain characteristics of said repetitive signal pulses; display memory means; image formatting said bit mapping means for retrieving said template data from said template memory means and for extracting said digitized signal pulse data from said buffer means, for bit mapping said template data and said digitized signal pulse data into a predetermined pixel array format, and for causing the bit mapped template data and bit mapped digitized signal pulse data to be stored in said display memory means; and display means for reading out the bit mapped template data and bit mapped digitized signal pulse data stored in said display memory means and for displaying the bit mapped template data and the bit mapped digitized signal pulse data in overlapping alignment to indicate the relationship between said repetitive signal pulses and said template. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. Signal processing and display apparatus for monitoring a frame sync bit of an Integrated Services Digital Network communication signal, comprising:
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signal acquisition means for connection to an "S" interface of an Integrated Services Digital Network communication network to receive communicated data signals and operative to detect and digitize at least a selected portion of selected data frames including said frame sync bit to form digitized signal pulse data; buffer means for temporarily storing said digitized signal pulse data; template memory means for storing template data corresponding to a template in the form of a mask of one data state having a window area therein of a second data state, the borders of the window area corresponding to acceptable tolerance limits of said frame sync bit; display memory means; image formatting and bit mapping means for retrieving said template data from said template memory means and for extracting said digitized signal pulse data from said buffer means, for bit mapping said template data and said digitized signal pulse data into a predetermined pixel array format, and for storing the bit mapped template data and bit mapped digitized signal pulse data in said display memory means; and display means for displaying the bit mapped template data and the bit mapped digitized signal pulse data in overlaying relationship to indicate the relationship between said frame sync bit and said template.
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13. A method of detecting, processing and displaying a frame sync bit of a data frame of an Integrated Services Digital Network communication signal, comprising the steps of:
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acquiring and digitizing a portion of communicated data frames including the sync bit to generate a signal pulse data corresponding thereto; temporarily storing said signal pulse data; providing a template data corresponding to a template in the form of a mask having a window area, the borders of the window area corresponding to the acceptable tolerance limits of said frame sync bit; formatting and bit mapping said template data and the temporarily stored signal pulse data; storing the bit mapped template data and the bit mapped signal pulse data in a display memory; and reading out and displaying the stored bit mapped template data and the bit mapped signal pulse data in overlaying relationship on a single display screen. - View Dependent Claims (14, 15)
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Specification