Motion detecting apparatus

• US 5,339,104 A
• Filed: 12/09/1992
• Issued: 08/16/1994
• Est. Priority Date: 12/09/1991
• Status: Expired due to Term

• Current Assignee: Goldstar Jewellery LLC
• Original Assignee: Goldstar Jewellery LLC
• Inventors: Hong, Sam P.
• Primary Examiner(s): Britton, Howard W.
• Application Number:
  US07/987,690
• Time in Patent Office: 615 Days
• Field of Search: 358/105, 358/108
• US Class Current: 348/155
• CPC Class Codes: G08B 13/19602 Image analysis to detect motion of the intruder, e.g. by frame subtraction
• CPC Class Codes: G08B 13/19634 Electrical details of the system, e.g. component blocks for carrying out specific functions
• CPC Class Codes: H04N 19/503 involving temporal prediction adaptive coding with adaptive selection between spatial and temporal predictive coding H04N19/107; adaptive coding with adaptive selection among a plurality of temporal predictive coding modes H04N19/109
• CPC Class Codes: H04N 5/144 Movement detection for video coding H04N19/503; analysis of motion in general G06T7/20
• CPC Class Codes: H04N 7/18 Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast

Abstract

A motion detection apparatus capable of editing a monitoring range and of adjusting the motion indication and the indication level, which includes an analog/digital converter, a synchronous separator, a system clock generator, a microcomputer, a memory control and address generator, a picture memory and motion comparator, a level comparing and motion output controller, an alarm output controller, a window control and marker indication controller, and a picture synthesizer.

Claims

1. A motion detecting apparatus, comprising:

an analog/digital converter for sampling a video signal input from a charge-coupled device camera and converting the sampled signal into a digital signal;

a synchronous separator for separating said sampled video signal into a horizontal synchronous signal and a vertical synchronous signal;

a system clock generator for generating a system clock signal;

a microcomputer for controlling motion detection, a window/marker indication and window editing in response to key signals from a keyboard;

a memory control and address generator for receiving the horizontal synchronous signal and vertical synchronous signal from said synchronous separator and outputting an address signal and a control signal for determining an effective sampling region and a motion comparing region under control of said microcomputer;

a picture memory comparator for receiving the digital video signal from said analog/digital converter and detecting motion of an image by comparing previously input field data and currently input field data under control of said memory control and address generator;

a level comparing and motion output controller for comparing the motion of the image from said picture memory and motion comparator with a limit value and a reference value and controlling a motion output;

an alarm output controller for outputting an alarm control signal to an external controller when said level comparing and motion output controller indicates the motion of the image exceeds the limit value;

a window control and marker indication controller for controlling a window and a marker indication in response to an address signal, for designating a magnitude of a window/marker of said memory control and address generator, and a window/marker selection control signal of the microcomputer upon receipt of the motion output from the level comparing and motion output controller; and

a picture synthesizer for synthesizing the motion output from said window control and marker indication controller and the video signal and outputting a video signal indicated with a window or a marker.

2. The apparatus of claim 1, wherein said picture memory and motion comparator includes:

a latch for latching the digital video signal from said analog/digital converter;

a video RAM for storing the currently input field data and outputting the previously input field data in response to said memory control and address generator; and

an EPROM for comparing the currently input field data from said analog/digital converter with the previously input field data input from the video RAM and outputting a motion factor value in response to a difference obtained from said comparison.

3. The apparatus of claim 1, wherein said level comparing and motion output controller includes:

a limit comparator for outputting a first control signal by comparing a motion factor value output from said picture memory and motion comparator with the limit value;

a level comparator for outputting a second control signal when the motion factor value is less than the reference value by comparing the motion factor value with the reference value;

a detection range discriminator for outputting motion data by detecting an effective motion range with a monitoring area in response to the first and second control signals of the limit comparator and the level comparator, respectively and window data;

a counter for counting outputs from said detection range discriminator in response to detection range data from said microcomputer; and

a flip-flop for applying the outputs from said counter to said alarm output controller.

4. The apparatus of claim 1, wherein said memory control and address generator includes:

an effective sampling range generator for generating and applying effective sampling signals to said analog/digital converter in response to the system clock signal of said system clock generator and the horizontal and vertical synchronous signals of said synchronous separator;

an address counter for receiving and counting said effective sampling signals and outputting a counted signal as a RAM address signal of said picture memory and motion comparator;

a RAM control signal generator for receiving the RAM address signal of said address counter and generating the control signal of said picture memory and motion comparator and the address signal from said window control and marker indication controller in response to the horizontal and vertical synchronous signals and a control signal from said microcomputer; and

an address selector for selecting a window address of the microcomputer or the RAM address signal from said address counter in response to an address selection signal from said microcomputer and outputting the selected address as a window RAM address.

5. The apparatus of claim 1, wherein said window control and marker indication controller includes:

a marker RAM for receiving a marker address from said memory control and address generator and the motion output of said level comparing and motion output controller and generating a marker signal indicating a motion sign;

a window RAM for outputting a window signal for forming a monitoring region in response to a window address of said memory control and address generator and a control signal from said microcomputer; and

a cursor RAM for outputting cursor data in response to the address signal from said memory control and address generator and the control signal from said microcomputer.

6. The apparatus of claim 1, wherein said picture synthesizer includes;

a latch for latching the motion output of said level comparing and motion output controller;

a first switching unit for selecting the marker indication or the window of said window control and marker indication controller in response to an output signal of said latch;

a second switching unit for selecting an output signal of said first switching unit or a predetermined reference voltage in response to cursor data from said window control and marker indication controller;

a third switching unit for selectively switching the video signal or the predetermined reference voltage in response to an output signal from said second switching unit; and

a buffer for buffering output signals from said third switching unit and outputting the buffered signal as the output video signal.

7. A motion detecting apparatus, comprising:

an analog/digital converter for sampling an input video signal and outputting a digital video signal;

a synchronous separator for separating a horizontal synchronous signal and a vertical synchronous signal from the digital input signal;

a system clock generator for generating a system clock signal;

editing means for receiving a previous frame and a current frame of the digital video signal, the horizontal synchronous signal, the vertical synchronous signal, and the system clock and for varying a size of a motion detection window by determining a difference between the previous frame and the current frame of the digital video signal; and

a picture synthesizer for generating an output signal based on the size of the motion detection window.

8. The apparatus of claim 7, said editing means including,

a memory control and address generator for receiving the horizontal synchronous signal and vertical synchronous signal from said synchronous separator and outputting an address signal and a control signal for determining an effective sampling region and a motion comparing region;

a picture memory and motion comparator for receiving the digital video signal from said analog/digital converter and for comparing the previous frame and the current frame to detect motion;

a level comparing and motion output controller for comparing the motion from said picture memory and motion comparator with a reference value to produce a motion output;

an alarm output controller for outputting an alarm control signal to an external controller when said level comparing and motion output controller indicates the motion of the image exceeds the reference value;

a window control and marker indication controller for controlling a window and a marker indication in response to the address signal, for designating a magnitude of a window/marker of said memory control and address generator, and a window/marker selection control signal upon receipt of the motion output from the level comparing and motion output controller; and

microprocessor means for controlling said memory control and address generator, said picture means and motion comparator, said level comparing and motion output controller, said alarm output controller, and said window control and marker indicator controller;

wherein said picture synthesizer synthesizes the motion output from said window control and marker indication controller and the digital video signal and outputs a video signal indicating a window or a marker.

9. The apparatus of claim 8, wherein said picture memory and motion comparator includes:

a latch for latching the digital video signal from said analog/digital converter;

a video RAM for storing the current frame of the digital video signal and outputting the previous frame of the digital video signal in response to said memory control and address generator; and

an EPROM for comparing the current frame of the digital video signal from said analog/digital converter with the previous frame of the digital video signal input from said video RAM and outputting a motion factor value in response to a difference obtained from said comparison.

10. The apparatus of claim 8, wherein said level comparing and motion output controller includes:

a limit comparator for outputting a first control signal by comparing a motion factor value output from said picture memory and motion comparator with the reference value;

a level comparator for outputting a second control signal when the motion factor value is less than the reference value;

a detection range discriminator for outputting motion data by detecting an effective motion range within a monitoring area in response to the first and second control signals of the limit comparator and the level comparator, respectively;

a counter for counting outputs from said detection range discriminator in response to detection range data from said microprocessor means; and

a flip-flop for applying the outputs from said counter to said alarm output controller.

11. The apparatus of claim 8, wherein said memory control and address generator includes:

an effective sampling range generator for generating and applying effective sampling signals to said analog/digital converter in response to the system clock signal of said system clock generator and the horizontal and vertical synchronous signals of said synchronous separator;

an address counter for receiving and counting said effective sampling signals and outputting a counted signal as a RAM address signal of said picture memory and motion comparator;

a RAM control signal generator for receiving the RAM address signal of said address counter and generating the control signal of said picture memory and motion comparator and the address signal from said window control and marker indication controller in response to the horizontal and vertical synchronous signals and a control signal from said microprocessor means; and

an address selector for selecting a window address of said microprocessor means or the RAM address signal from said address counter in response to an address selection signal from said microprocessor means and outputting the selected address as a window RAM address.

12. The apparatus of claim 8, wherein said window control and marker indication controller includes:

a marker RAM for receiving a marker address from said memory control and address generator and the motion output of said level comparing and motion output controller and generating a marker signal indicating a motion sign;

a window RAM for outputting a window signal for forming a monitoring region in response to a window address of said memory control and address generator and a control signal from said microprocessor means; and

a cursor RAM for outputting cursor data in response to the address signal from said memory control and address generator and the control signal from said microprocessor means.

13. The apparatus of claim 8, wherein said picture synthesizer includes;

a latch for latching the motion output of said level comparing and motion output controller;

a first switching unit for selecting the marker indication or the window of said window control and marker indication controller in response to an output signal of said latch;

a second switching unit for selecting an output signal of said first switching unit or a predetermined reference voltage in response to cursor data from said window control and marker indication controller;

a third switching unit for selectively switching the digital video signal or the predetermined reference voltage in response to an output signal from said second switching unit; and

a buffer for buffering output signals from said third switching unit and outputting the buffered signal as the output video signal.

14. A motion detecting apparatus, comprising:

memory control and address generator means for determining an effective sampling region and a motion comparing region and for outputting an address signal and a control signal;

picture memory and motion comparator means for detecting motion in an input signal by comparing a previous field of the input signal with a current field of the input signal and outputting a motion signal;

level comparing and motion output controller for comparing the motion signal with a limit value and outputting a alarm signal when the motion signal exceeds the limit value;

window control and marker indication controller for receiving the address signal and the motion signal and designating a window or a marker indication; and

a picture synthesizer for outputting a window video signal or a marker video signal from the input signal and the window or marker indication.

15. The apparatus of claim 14, further comprising:

an analog/digital converter for sampling the input signal and outputting a digital signal;

a synchronous separator for separating a horizontal synchronous signal and a vertical synchronous signal from the digital signal; and

a system clock generator for generating a system clock signal.

16. The apparatus of claim 15, wherein said picture memory and motion comparator includes:

a latch for latching the digital signal from said analog/digital converter;

a video RAM for storing the current field of the input signal and outputting the previous field of the input signal in response to said memory control and address generator means; and

an EPROM for comparing the current field of the input signal from said analog/digital converter with the previous field of the input signal input from said video RAM and outputting a motion factor value in response to a difference obtained from said comparison.

17. The apparatus of claim 15, wherein said level comparing and motion output controller includes:

a limit comparator for outputting a first control signal by comparing a motion factor value output from said picture memory and motion comparator with the limit value;

a level comparator for outputting a second control signal when the motion factor value is less than the limit value by comparing the motion factor value with the limit value;

a detection range discriminator for outputting motion data by detecting an effective motion range with a monitoring area in response to the first and second control signals of the limit comparator and the level comparator, respectively;

a counter for counting outputs from said detection range discriminator in response to detection range data; and

a flip-flop for applying the outputs from said counter to an alarm output controller.

18. The apparatus of claim 15, wherein said memory control and address generator means includes:

an effective sampling range generator for generating and applying effective sampling signals to said analog/digital converter in response to the system clock signal of said system clock generator and the horizontal and vertical synchronous signals of said synchronous separator;

an address counter for receiving and counting said effective sampling signals and outputting a counted signal as a RAM address signal of said picture memory and motion comparator;

a RAM control signal generator for receiving the RAM address signal of said address counter and generating the control signal of said picture memory and motion comparator and the address signal from said window control and marker indication controller in response to the horizontal and vertical synchronous signals; and

an address selector for selecting a window address or the RAM address signal from said address counter in response to an address selection signal and outputting the selected address as a window RAM address.

19. The apparatus of claim 15, wherein said window control and marker indication controller includes:

a marker RAM for receiving a marker address from said memory control and address generator means and the motion output of said level comparing and motion output controller and generating a marker signal indicating a motion sign;

a window RAM for outputting a window signal for forming a monitoring region in response to a window address of said memory control and address generator and a control signal; and

a cursor RAM for outputting cursor data in response to the address signal from said memory control and address generator means and the control signal.

20. The apparatus of claim 15, wherein said picture synthesizer includes;

a latch for latching the motion output of said level comparing and motion output controller;

a first switching unit for selecting the marker indication or the window of said window control and marker indication controller in response to an output signal of said latch;

a second switching unit for selecting an output signal of said first switching unit or a predetermined reference voltage in response to cursor data from said window control and marker indication controller;

a third switching unit for selectively switching the input signal or the predetermined reference voltage in response to an output signal from said second switching unit; and

a buffer for buffering output signals from said third switching unit and outputting the buffered signal as an output signal.