Single-ended and differential transistor amplifier circuits with full signal modulation compensation techniques which are technology independent

• US 5,343,163 A
• Filed: 06/21/1993
• Issued: 08/30/1994
• Est. Priority Date: 04/20/1992
• Status: Expired due to Term

• Current Assignee: Microelectronics Technology Inc (MTI Laboratory Inc)
• Original Assignee: Hughes Aircraft Company (Rtx Corporation)
• Inventors: Linder, Lloyd F., Birdsall, Dwight D.
• Primary Examiner(s): MOTTOLA, STEVEN J
• Application Number:
  US08/080,269
• Time in Patent Office: 435 Days
• Field of Search: 330/149, 330/252, 330/261, 330/69, 330/292
• US Class Current: 330/252
• CPC Class Codes: H03F 1/3211 in differential amplifiers
• CPC Class Codes: H03F 1/3217 in single ended push-pull amplifiers
• CPC Class Codes: H03F 1/3276 using the nonlinearity inherent to components, e.g. a diode
• CPC Class Codes: H03F 2203/45578 the IC comprising one or more diodes as level shifters
• CPC Class Codes: H03F 2203/45611 the IC comprising only one input signal connection lead for one phase of the signal
• CPC Class Codes: H03F 2203/45612 the IC comprising one or more input source followers as input stages in the IC
• CPC Class Codes: H03F 2203/45641 the LC being controlled, e.g. by a signal derived from a non specified place in the dif amp circuit
• CPC Class Codes: H03F 2203/45721 the LC comprising only an output circuit for one phase of the signal
• CPC Class Codes: H03F 3/3081 Duplicated single-ended push-pull arrangements, i.e. bridge circuits using FET's H03F3/3061
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03F 3/45098 PI types H03F3/45125, H03F3/45152 take precedence
• CPC Class Codes: H03F 3/50 Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower
• CPC Class Codes: H03F 3/505 with field-effect devices

Abstract

A compensating transistor (Q5) is connected in series with the collector of a main transistor (Q3), and a level shifted replica (Vin+V1) of an input signal (Vin) is applied to the base of the compensating transistor (Q5) to maintain a constant voltage difference between the base and collector of the main transistor (Q3) and compensate for base width modulation ΔVce. A voltage-controlled current source (S1) is responsive to the input signal (Vin) and applies a compensating current ΔIload which is equal and opposite to the load current variation caused by a change (ΔVin) in the input voltage (Vin) to the emitter of the main transistor (Q3) to compensate for load current modulation ΔVbe. Alternatively, the compensating current can be applied to the junction of the base of the main transistor (Q3) and the emitter of pre-distortion transistor (Q4) which has a base connected to receive the input signal (Vin). Another compensating transistor (Q12) applies a current (ΔIb) which is equal and opposite to a non-linear base current variation to the emitter or collector of the main transistor (Q3) to compensate for current gain modulation ΔIb. The modulation compensation arrangements are applicable to common-collector, common-base and common emitter amplifiers in single-ended and differential configurations, and to substantially all bipolar and field-effect transistor technologies.

Claims

1. A differential amplifier circuit, comprising:

main differential amplifier means including first and second differentially connected main transistors and a transfer function having a non-linear error; and

differential compensation amplifier means for producing and applying first and second differential compensating current signals to the main differential amplifier means which are equal and opposite to the signal current developed across a degeneration resistor in the main differential amplifier means and which cancel respective current variations in the first and second main transistors caused by said non-linear error respectively thereby maintaining a constant base emitter voltage in the first and second differentially connected main transistors.

2. A differential amplifier circuit, comprising:

main differential amplifier means including first and second differentially connected main transistors the first and second main transistors connected through a degeneration resistor wherein a signal current is produced across said degeneration resistor in response to an applied input stimulus, and a transfer function having a non-linear error; and

a resistively degenerated differential compensation amplifier means for producing and applying first and second differential compensating current signals to the main amplifier means which are equal and opposite to and cancel respective current variations in the first and second main transistors caused by said non-linear error respectively;

in which the compensating means and generator means are configured such that substantially constant current flows through the first and second main transistors thereby maintaining a constant forward base emitter voltage.

3. A differential amplifier circuit, comprising:

main differential amplifier means including first and second differentially connected main transistors the first and second main transistors connected through a degeneration resistor wherein a signal current is produced across said degenerating resistor in response to an applied input stimulus, and a transfer function having a non-linear error; and

a resistively degenerated differential compensation amplifier means for producing and applying first and second differential compensating current signals to the main differential amplifier means which are equal and opposite to and cancel respective current variations in the first and second main transistors caused by said non-linear error respectively;

in which the compensating means and generator means are configured such that substantially constant forward base emitter voltage is maintained through the first and second main transistors.

4. A differential amplifier circuit comprising:

a main differential amplifier means for maintaining a constant forward base-emitter voltage including,

first and second main transistors connected through a degeneration resistor, and

a signal current produced across said degeneration resistor in response to an applied input stimulus; and

a resistively degenerated compensation means including, a pair of resistively degenerated differential amplifiers, for producing a pair of constant compensating differential current signals to said main differential amplifier means for maintaining a constant forward base-emitter voltage through the first and second main transistors.