High speed modem

• US 5,343,515 A
• Filed: 09/13/1991
• Issued: 08/30/1994
• Est. Priority Date: 09/13/1991
• Status: Expired due to Fees

• Current Assignee: Remco V. Treffkorn
• Original Assignee: Remco V. Treffkorn
• Inventors: Treffkorn, Remco V.
• Primary Examiner(s): Kuntz, Curtis
• Assistant Examiner(s): Woo, Stella L.
• Application Number:
  US07/759,408
• Time in Patent Office: 1,082 Days
• Field of Search: 379/97, 379/98, 379/96, 379/93, 375/8, 375/121
• US Class Current: 379/93.33
• CPC Class Codes: H04M 11/06 Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors

Abstract

A modem having at least two modem protocols, a slow full duplex protocol and a fast half duplex protocol, for use of either depending on a received rate of data. A modem for switching between a plurality of protocols for data transmission and reception. The modem capable of switching between a fast and a slow protocol depending on the received rate of data. The received rate of data determined by measuring received amounts of data during predetermined time intervals. Alternatively, the received data rate determined by measuring an amount of data stored in a memory. The modem capable of full duplex interactive operation and 9600 BPS data transfers in a seamless manner. The modem operable with streaming error correction protocols. Also, described is a method for communication of data between at least two modems each capable of operating at a plurality of data rates. Also, described is a system for communication of binary data comprising a binary data source and a modem.

Claims

1. A modem for switching between a plurality of protocols and for connecting digital data terminal equipment to an analog communication link, the modem comprising in operative combination;

a first connector coupled to the data terminal equipment for receiving first serial signals from the data terminal equipment;

a receiver transmitter coupled to the first connector for receiving and converting the first serial signals to parallel signals;

an organized plurality of signal lines coupled to the receiver transmitter for transferring the parallel signals;

a processor coupled to the organized plurality of signal lines for receiving the parallel signals;

a controller coupled to the organized plurality of signal lines for receiving the parallel signals;

a first memory coupled to the organized plurality of signal lines for receiving the parallel signals;

a second memory coupled to the organized plurality of signal lines for storing the plurality of protocols for operation of the modem;

a timer coupled to the organized plurality of signal lines for providing timing signals to the processor through the organized plurality of signal lines;

the processor for receiving the timing signals and the parallel signals for determining a rate of data from the data terminal equipment, the processor further for providing a first control signal when the rate of data is greater than a first predetermined value, the first control signal for providing one of the plurality of protocols for operation of the modem;

the controller for converting the parallel signals into data blocks and for converting the data blocks into second serial signals; and

a modulator coupled to the controller for receiving the second serial signals and for converting the second serial signals to first analog signals, the modulator further coupled for receiving the first control signal, the modulator selectively operable at a plurality of modulation rates, the modulator for selected operation at a first determined modulation rate due to the first control signal and the one of the plurality of protocols, the modulator for converting the second serial signals to the first analog signals at the first determined modulation rate; and

transfer means for transferring the first analog signals to the analog communication link.

2. A modem, as recited in claim 1, wherein the processor further is for providing a second control signal when the rate of data from the data terminal equipment is less than a second predetermined value, the second control signal for providing another of the plurality of protocols for operation of the modem, the modulator further coupled for receiving the second control signal and for selected operation at a second determined modulation rate in response to the second control signals, and the modulator further for converting the second serial signals to the first analog signals at the second determined modulation rate.

3. A modem, as recited in claim 2, further comprising a demodulator coupled to the controller and to transfer means, the transfer means further for receiving second analog signals from the analog communication link, the demodulator coupled to the transfer means for receiving the second analog signals and converting the second analog signals to third serial signals.

4. A modem, as recited in claim 3, wherein the demodulator is selectively operable at a plurality of demodulation rates, the demodulator coupled to the processor for receiving the first control signal and for selected operation at the first determined demodulation rate in response to the first control signal, and the demodulator further for converting the second analog signals to the third serial signals at the first determined demodulation rate and for providing the third serial signals to the controller.

5. A modem, as recited in claim 4, wherein the demodulator is coupled to the processor for receiving the second control signal and for selected operation at the second determined demodulation rate in response to the second control signal, and the demodulator further for converting the second analog signals to the third serial signals at the second determined demodulation rate.

6. A modem, as recited in claim 5, wherein the processor is for determining when the rate of data from the data terminal equipment is greater the first predetermined value based on a predetermined amount of data in the first memory.

7. A modem, as recited in claim 6, wherein the first predetermined value is approximately 300 bits per second, and the second predetermined value is approximately 9600 bits per second.