Method of making field effect transistor

• US 5,344,788 A
• Filed: 06/10/1993
• Issued: 09/06/1994
• Est. Priority Date: 04/19/1990
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Noda, Minoru
• Primary Examiner(s): Fourson, George
• Assistant Examiner(s): Booth, Richard A.
• Application Number:
  US08/074,564
• Time in Patent Office: 453 Days
• Field of Search: 437/40, 437/41, 437/44, 437/912, 437/909
• US Class Current: 438/179
• CPC Class Codes: H01L 21/28581 Deposition of Schottky electrodes
• CPC Class Codes: H01L 21/28587 characterised by the sectional shape, e.g. T, inverted T
• CPC Class Codes: H01L 29/0891 of field-effect transistors with Schottky gate
• CPC Class Codes: H01L 29/42316 for field-effect transistors
• CPC Class Codes: H01L 29/66659 with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 29/66878 Processes wherein the final gate is made before the formation, e.g. activation anneal, of the source and drain regions in the active layer

Abstract

A field effect transistor having an asymmetric gate includes high dopant concentration source and drain regions. The drain region is shallower and of lower dopant concentration than the source region. The drain is spaced from the gate electrode. Therefore, an ideal FET having a reduced short channel effect and having a lower source resistance and high current drivability (gm) is obtained. When the drain region is produced by ion implantation through a film and the source region is produced by the implantation directly into the substrate, only the drain region is separated from the gate. When the insulating film on the source region is separated from the insulating film on the drain region, the insulating film on the source region is reliably selectively removed, whereby high controllability is obtained.

Claims

1. A production method of a field effect transistor comprising:

producing a gate electrode on a substrate;

depositing a first insulating film covering said gate electrode and said substrate;

etching said first insulating film to expose said gate electrode;

depositing a second insulating layer comprising a material different from that of said first insulating film on said first insulating film and removing part of said second insulating layer, leaving a second insulating layer only at a first side of said gate electrode and on said gate electrode;

depositing a photoresist layer and patterning said photoresist layer to leave a photoresist film on said first and second insulating films, said photoresist film having an opening at and exposing part of said first insulating film at a second side of said gate electrode on the opposite side of said gate electrode from the first side of said gate electrode and selectively removing said first insulating film at the second side of said gate electrode using said photoresist film as a mask;

removing said photoresist film and said second insulating film;

etching said first insulating film remaining on said substrate to leave a side wall of said first insulating film at the first side of said gate electrode; and

implanting ions using said gate electrode and said side wall of said first insulating film as masks to produce source and drain regions in said substrate.