Individual selective-calling receiver with reduced number of switches
First Claim
1. An individual selective-calling receiver comprising:
- a central processing unit (CPU);
a switch for being selectively placed operator;
a switch state judging circuit, connected between said CPU and said switch, for judging a state of said switch and supplying a state signal, indicative of the state of said switch, to said CPU;
said CPU, responsive to receipt of said state signal, outputting an ON-state signal when said state signal indicates that said switch is in said ON-state;
a first timer, connected to receive said ON-state signal, for generating a first output signal in response to said ON-state signal being generated for a time period longer than a first predetermined time period; and
a receiving-frequency selection circuit, connected to said CPU, for selecting one of a plurality of receiving frequencies at which said individual selective-calling receiver is to operate,said CPU, in response to said first output signal of the first timer, operating (i) to begin a frequency selection operation for selecting said one of said receiving frequencies, and (ii) after selection of said one of said receiving frequencies, to supply frequency selection information specifying said one of said receiving frequencies to said receiving-frequency selection circuit.
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Accused Products
Abstract
An individual selective-calling receiver is disclosed which includes a switch, a first timer for generating an output signal in a case where the switch is put in an ON-state for a time longer than a first predetermined time, a second timer started by the output signal of the first timer for generating an output signal at intervals of a second predetermined time, and a receiving-frequency selection circuit (for example, a PLL) for selecting one of a plurality of receiving frequencies, and in which the receiving-frequency selection circuit commences a frequency selecting operation on the basis of the output signal of the first timer. The receiving frequencies are successively selected in accordance with the output signal of the second timer, and the frequency selecting operation of the receiving-frequency selection circuit is stopped when the switch is again put in the ON-state, to maintain a selected receiving frequency.
6 Citations
5 Claims
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1. An individual selective-calling receiver comprising:
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a central processing unit (CPU); a switch for being selectively placed operator; a switch state judging circuit, connected between said CPU and said switch, for judging a state of said switch and supplying a state signal, indicative of the state of said switch, to said CPU; said CPU, responsive to receipt of said state signal, outputting an ON-state signal when said state signal indicates that said switch is in said ON-state; a first timer, connected to receive said ON-state signal, for generating a first output signal in response to said ON-state signal being generated for a time period longer than a first predetermined time period; and a receiving-frequency selection circuit, connected to said CPU, for selecting one of a plurality of receiving frequencies at which said individual selective-calling receiver is to operate, said CPU, in response to said first output signal of the first timer, operating (i) to begin a frequency selection operation for selecting said one of said receiving frequencies, and (ii) after selection of said one of said receiving frequencies, to supply frequency selection information specifying said one of said receiving frequencies to said receiving-frequency selection circuit. - View Dependent Claims (3, 4, 5)
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2. An individual selective-calling receiver for use in a communication system, in which a plurality of receivers are and a specified one of the receivers is selectively called by using a selected one of a plurality of transmitting frequencies, said individual selective-calling receiver comprising:
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a switch; a first timer, operatively associated with said switch, for generating an output signal in response to said switch being placed in an ON-state for a time period longer than a first predetermined time period;
.a second timer, operatively associated with said first timer and started in response to the output signal of the first timer, for generating an output signal at predetermined time intervals; and a receiving-frequency selection circuit, operatively associated with said first timer and said second timer, for performing a frequency selecting operation to select one of a plurality of receiving frequencies, said receiving-frequency selection circuit (i) commencing said frequency selecting operation on the basis of the output signal of the first timer, wherein the plurality of receiving frequencies are successively selected by said receiving-frequency selection circuit in accordance with the output signal of the second timer, and (ii) stopping the frequency selecting operation when the switch is placed in the ON-state after having been placed in an OFF-state at some time after said output signal of said first timer is generated, to select said one of said plurality of receiving frequencies.
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Specification