Crystallization and doping of amorphous silicon on low temperature plastic

• US 5,346,850 A
• Filed: 10/29/1992
• Issued: 09/13/1994
• Est. Priority Date: 10/29/1992
• Status: Expired due to Term

• Current Assignee: Lawrence Livermore National Security LLC (Government of the United States of America)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Weiner, Kurt H., Truher, Joel B., Kaschmitter, James L., Sigmon, Thomas W.
• Primary Examiner(s): Breneman, R. Bruce
• Assistant Examiner(s): Paladugu, Ramamohan Rao
• Application Number:
  US07/968,561
• Time in Patent Office: 684 Days
• Field of Search: 148/33, 148/33.3, 148/DIG. 90, 148/DIG. 93, 156/603, 437/173, 437/83, 437/82, 437/81, 437/181
• US Class Current: 438/487
• CPC Class Codes: C30B 1/023 from solids with amorphous structure
• CPC Class Codes: C30B 29/06 Silicon
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/02689 using particle beams
• CPC Class Codes: H01L 21/32155 Doping polycristalline - or amorphous silicon layers
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence

Abstract

A method or process of crystallizing and doping amorphous silicon (a-Si) on a low-temperature plastic substrate using a short pulsed high energy source in a selected environment, without heat propagation and build-up in the substrate. The pulsed energy processing of the a-Si in a selected environment, such as BF3 and PF5, will form a doped micro-crystalline or poly-crystalline silicon (pc-Si) region or junction point with improved mobilities, lifetimes and drift and diffusion lengths and with reduced resistivity. The advantage of this method or process is that it provides for high energy materials processing on low cost, low temperature, transparent plastic substrates. Using pulsed laser processing a high (>900° C.), localized processing temperature can be achieved in thin films, with little accompanying temperature rise in the substrate, since substrate temperatures do not exceed 180° C. for more than a few microseconds. This method enables use of plastics incapable of withstanding sustained processing temperatures (higher than 180° C.) but which are much lower cost, have high tolerance to ultraviolet light, have high strength and good transparency, compared to higher temperature plastics such as polyimide.

Claims

1. A method for improving the crystallinity of a thin film of amorphous silicon directly deposited on a low temperature plastic substrate incapable of withstanding sustained processing temperatures higher than about 180°

C. and sustained processing time periods longer than about 10⁵ nanoseconds, comprising the steps of;

positioning the deposited thin film in a controlled atmosphere; and

applying at least one pulse from a pulsed high energy source onto the thin film for a time period sufficient to change the crystallinity of the thin film without heating the substrate above a temperature of about 180°

C. for more than about 10⁵ nanoseconds.

2. The method of claim 1, additionally including the step of forming the low-temperature plastic substrate from material selected from the group consisting of E-CTFE, E-TFE, PES, PVDF, PTFE, FEP and HDPE.

3. The method of claim 2, additionally including the steps of depositing a thin film of amorphous silicon on the low-temperature plastic substrate.

4. The method of claim 3, wherein the step of depositing the thin film is carried by a process selected from the group of evaporation, sputtering, electro-deposition, solvent-deposition, spin-on coating and PECVD.

5. The method of claim 2, additionally including the steps of depositing a layer of thermal barrier material on the low-temperature plastic substrate, and then depositing a thin film of amorphous silicon on the layer of thermal barrier material.

6. The method of claim 5, wherein the step of depositing the layer of thermal barrier material is carried out by depositing a layer of SiO₂ onto the low-temperature plastic substrate by a process selected from the group of sputtering, electro-deposition, solvent-deposition, spin-on coating and PECVD.

7. The method of claim 6, wherein the step of depositing the thin film of amorphous silicon is carried out by a technique selected from evaporation, electro-deposition, solvent-deposition, spin-on coating and sputtering.

8. The method of claim 6, wherein the layer of SiO₂ is deposited to a thickness of 0.5 μ

m, and wherein the thin film of amorphous silicon is deposited to a thickness of 0.5 μ

m.

9. The method of claim 8, wherein the low-temperature substrate is formed from 0.13 mm thick E-CTFE.

10. The method of claim 8, wherein said at least one pulse from a pulsed high energy source is provided by a pulsed ultra-violet laser producing 30 ns pulses of 308 nm light.

11. The method of claim 1, wherein the step of applying at least one pulse from a pulsed high energy source is provided from a group of high energy sources composed of XeCl, KrF and ArF excimer lasers, electron-beams, dye lasers, flashlamps, YAG lasers.

12. The method of claim 11, wherein the at least one pulse from a pulsed energy high energy source is provided by an XeCl excimer laser operating at energy levels of about 150 mJ cm^-2 to about 800 mJ cm^-2.

13. The method of claim 12, additionally including the step of providing the at least one pulse from the XeCl eximer laser for a time period of about 5 to 60 ns.

14. The method of claim 11, additionally including the step of providing the at least one pulse for a time period less than 10⁵ ns.

15. The method of claim 1, wherein the controlled atmosphere is provided by the step of selecting an environment from the group of air, hydrogen, oxygen, BF₃, AsF₅ and PF₅.

16. The method of claim 2, wherein the controlled atmosphere is provided by the step of selecting an environment from the group consisting of a vacuum at <

1 mT, 50 torr BF₃, and 50 torr PF₅.

17. The method of claim 16, wherein the at least one pulse is provided by a XeCl excimer laser producing irradiation in the range of about 150 mJ cm^-2 to about 800 mJ cm^-2.

18. The method of claim 1, additionally including the step of providing the controlled atmosphere with a dopant selected from the group of BF3, and PF5 such that the changed crystallinity of the amorphous silicon is composed of polycrystalline or micro-crystalline silicon doped with boron or phosphorous.

19. The method of claim 17, wherein the XeCl excimer laser produced 30 ns (FFWHM) pulses of 308 nm light.

20. A process for producing at least one region of doped polycrystalline or micro-crystalline silicon in a thin film of amorphous silicon deposited on a substrate composed of commercial-grade plastic incapable of withstanding processing;

temperatures of higher than 180°

C. for longer than about 35 nanoseconds, comprising the steps of;

forming the substrate from material selected from the group of E-CTFE, E-TFE, PES, PVDF, PTFE, FEP, and HDPE;

depositing a thin film of amorphous silicon on the substrate;

positioning the thus formed structure in a controlled environment selected from the group of vacuum (<

1 mT), 50 torr BF₃, and 50 torr PF₅ ; and

directing at least one pulse of 308 nm light from a XeCl laser onto the thin film of amorphous silicon for providing irradiation energy in the range of about 150 mJ cm^-2 to about 800 mJ cm^-2.

21. The process of claim 20, wherein a pulse of 308 nm light is provided for a time period of 5 to 60 nanoseconds.

22. The process of claim 21, additionally including the step of depositing a buffer layer of SiO2 on the substrate prior to depositing the thin film of amorphous silicon.

23. The process of claim 21, wherein the formed structure is produced from 0.13 mm thick E-CTFE, and 0.5 μ

m thick amorphous silicon.

24. The process of claim 23, wherein the formed structure is produced to include a 0.5 μ

m thick layer of SiO₂ between the substrate and the amorphous silicon.